| Message ID | 1408362166-5856-2-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Monday 18 August 2014 05:12 PM, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > CHV wants even rps opcodes so print a warning of the > min/max/rpe/rp1 values are odd, and warn if an odd value > slips through to valleyview_set_rps() and truncate it to > an even value. > > Also add a comment to chv_freq_opcode() to make sure no one > changes the code without considering this requirement. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index c8f744c..c84ad93 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3453,6 +3453,10 @@ void valleyview_set_rps(struct drm_device *dev, u8 val) > dev_priv->rps.cur_freq, > vlv_gpu_freq(dev_priv, val), val); > > + if (WARN_ONCE(IS_CHERRYVIEW(dev) && (val & 1), > + "Odd GPU freq value\n")) > + val &= ~1; > + > if (val != dev_priv->rps.cur_freq) > vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> > > @@ -4149,6 +4153,12 @@ static void cherryview_init_gt_powersave(struct drm_device *dev) > vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq), > dev_priv->rps.min_freq); > > + WARN_ONCE((dev_priv->rps.max_freq | > + dev_priv->rps.efficient_freq | > + dev_priv->rps.rp1_freq | > + dev_priv->rps.min_freq) & 1, > + "Odd GPU freq values\n"); > + > /* Preserve min/max settings in case of re-init */ > if (dev_priv->rps.max_freq_softlimit == 0) > dev_priv->rps.max_freq_softlimit = dev_priv->rps.max_freq; > @@ -7443,6 +7453,7 @@ static int chv_freq_opcode(struct drm_i915_private *dev_priv, int val) > return -1; > } > > + /* CHV needs even values */ > opcode = (DIV_ROUND_CLOSEST((val * 2 * mul), dev_priv->rps.cz_freq) * 2); > > return opcode; Patch looks fine to me Reviewed-by: Deepak S <deepak.s@linux.intel.com>
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c8f744c..c84ad93 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3453,6 +3453,10 @@ void valleyview_set_rps(struct drm_device *dev, u8 val) dev_priv->rps.cur_freq, vlv_gpu_freq(dev_priv, val), val); + if (WARN_ONCE(IS_CHERRYVIEW(dev) && (val & 1), + "Odd GPU freq value\n")) + val &= ~1; + if (val != dev_priv->rps.cur_freq) vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val); @@ -4149,6 +4153,12 @@ static void cherryview_init_gt_powersave(struct drm_device *dev) vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq), dev_priv->rps.min_freq); + WARN_ONCE((dev_priv->rps.max_freq | + dev_priv->rps.efficient_freq | + dev_priv->rps.rp1_freq | + dev_priv->rps.min_freq) & 1, + "Odd GPU freq values\n"); + /* Preserve min/max settings in case of re-init */ if (dev_priv->rps.max_freq_softlimit == 0) dev_priv->rps.max_freq_softlimit = dev_priv->rps.max_freq; @@ -7443,6 +7453,7 @@ static int chv_freq_opcode(struct drm_i915_private *dev_priv, int val) return -1; } + /* CHV needs even values */ opcode = (DIV_ROUND_CLOSEST((val * 2 * mul), dev_priv->rps.cz_freq) * 2); return opcode;