| Message ID | 1408651778-2636-1-git-send-email-przanoni@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Because BDW has WPT, which is equivalent to LPT. This is just like the > CPT/PPT case. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Maybe we should mention that Satheesh suggested the change with a: Suggested-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Because BDW has WPT, which is equivalent to LPT. This is just like the > CPT/PPT case. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> It'd be probably good to have drm/i915/bdw: in the subject to ease back porting for product groups, and add those patches to a list someone maintains (Rodrigo?)
On Thu, Aug 21, 2014 at 10:50:38PM +0100, Damien Lespiau wrote: > On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > > > Because BDW has WPT, which is equivalent to LPT. This is just like the > > CPT/PPT case. > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > > It'd be probably good to have drm/i915/bdw: in the subject to ease back > porting for product groups, and add those patches to a list someone > maintains (Rodrigo?) Forgotten your r-b tag or intentionally left blank? -Daniel > > -- > Damien > > > --- > > drivers/gpu/drm/i915/intel_pm.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index c8f744c..b3e948f 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -5595,6 +5595,8 @@ static void gen8_init_clock_gating(struct drm_device *dev) > > /* Wa4x4STCOptimizationDisable:bdw */ > > I915_WRITE(CACHE_MODE_1, > > _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); > > + > > + lpt_init_clock_gating(dev); > > } > > > > static void haswell_init_clock_gating(struct drm_device *dev) > > -- > > 2.0.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, Aug 26, 2014 at 07:16:34PM +0200, Daniel Vetter wrote: > On Thu, Aug 21, 2014 at 10:50:38PM +0100, Damien Lespiau wrote: > > On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote: > > > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > > > > > Because BDW has WPT, which is equivalent to LPT. This is just like the > > > CPT/PPT case. > > > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > > > > It'd be probably good to have drm/i915/bdw: in the subject to ease back > > porting for product groups, and add those patches to a list someone > > maintains (Rodrigo?) > > Forgotten your r-b tag or intentionally left blank? It's in 20140821214159.GA29975@strange.ger.corp.intel.com
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c8f744c..b3e948f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5595,6 +5595,8 @@ static void gen8_init_clock_gating(struct drm_device *dev) /* Wa4x4STCOptimizationDisable:bdw */ I915_WRITE(CACHE_MODE_1, _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); + + lpt_init_clock_gating(dev); } static void haswell_init_clock_gating(struct drm_device *dev)