From patchwork Wed Sep 3 20:10:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Padovan X-Patchwork-Id: 4836901 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1A9D2C033A for ; Wed, 3 Sep 2014 20:10:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3D6CC2021A for ; Wed, 3 Sep 2014 20:10:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3EB7220222 for ; Wed, 3 Sep 2014 20:10:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3BDA06E5BB; Wed, 3 Sep 2014 13:10:27 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-yh0-f50.google.com (mail-yh0-f50.google.com [209.85.213.50]) by gabe.freedesktop.org (Postfix) with ESMTP id C23D16E5C4; Wed, 3 Sep 2014 13:10:25 -0700 (PDT) Received: by mail-yh0-f50.google.com with SMTP id f10so5648611yha.37 for ; Wed, 03 Sep 2014 13:10:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9WYaT+4hpN6odiC4GShtyrsYoUxjAer/8QxfakdesWo=; b=PAnxvF//Lq+YNxgzS1Eg2oNaF9OdhS25ezB5ysrLTEjg4R05j31RLcIKLJI2MF7m4K dbckEDjxuk2bU90pYaESgxbW4Jb8q6cl9T4Wus1T8lyNQXKjN2Qc9XmnlZxJ20KzLBVa eWj2YpAqY/a3mOYCM2cq+uxIFq2hyu+3umPJhhzJZRkPrvhftD3kaO7GoRVRFekRPryL +lf9iKPaUfjZ5vqkNHXF78cngN74SHA9T/m6FhoOFUEE71OZRdyjPK9QFXE1va3i2AB/ JBI5y1U1sQoSibtgxxhEap3vWVI3t/nuzk+3ZefTvli/rBplvR9jRBG11RF3FFH8DmNG pf5Q== X-Received: by 10.236.120.163 with SMTP id p23mr5164811yhh.139.1409775025295; Wed, 03 Sep 2014 13:10:25 -0700 (PDT) Received: from localhost.localdomain ([179.110.36.38]) by mx.google.com with ESMTPSA id s6sm7684529yho.24.2014.09.03.13.10.23 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Sep 2014 13:10:24 -0700 (PDT) From: Gustavo Padovan To: intel-gfx@lists.freedesktop.org Date: Wed, 3 Sep 2014 17:10:15 -0300 Message-Id: <1409775018-16819-2-git-send-email-gustavo@padovan.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1409775018-16819-1-git-send-email-gustavo@padovan.org> References: <1409775018-16819-1-git-send-email-gustavo@padovan.org> Cc: Gustavo Padovan , dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH -v3 1/4] drm/i915: create struct intel_plane_state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Gustavo Padovan This new struct will be the storage of src and dst coordinates between the check and commit stages of a plane update. Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/i915/intel_drv.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index d727d20..be668ea 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -34,6 +34,7 @@ #include #include #include +#include /** * _wait_for - magic (register) wait macro @@ -237,6 +238,17 @@ typedef struct dpll { int p; } intel_clock_t; +struct intel_plane_state { + struct drm_crtc *crtc; + struct drm_framebuffer *fb; + struct drm_rect src; + struct drm_rect dst; + struct drm_rect clip; + struct drm_rect orig_src; + struct drm_rect orig_dst; + bool visible; +}; + struct intel_plane_config { bool tiled; int size;