From patchwork Wed Sep 10 21:09:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Packard X-Patchwork-Id: 4880801 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 76C45C0338 for ; Wed, 10 Sep 2014 21:09:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9F556201C7 for ; Wed, 10 Sep 2014 21:09:20 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6C04E20120 for ; Wed, 10 Sep 2014 21:09:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2825389FC8; Wed, 10 Sep 2014 14:09:18 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from keithp.com (home.keithp.com [63.227.221.253]) by gabe.freedesktop.org (Postfix) with ESMTP id 5524989FC8; Wed, 10 Sep 2014 14:09:17 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by keithp.com (Postfix) with ESMTP id EE05C760152; Wed, 10 Sep 2014 14:09:16 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from keithp.com ([127.0.0.1]) by localhost (keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id L8ZOpH0Ao1l7; Wed, 10 Sep 2014 14:09:14 -0700 (PDT) Received: by keithp.com (Postfix, from userid 1033) id E098076014A; Wed, 10 Sep 2014 14:09:13 -0700 (PDT) Received: from hiro.keithp.com (localhost [127.0.0.1]) by keithp.com (Postfix) with ESMTP id C614976013F; Wed, 10 Sep 2014 14:09:13 -0700 (PDT) Received: by hiro.keithp.com (Postfix, from userid 1001) id 6CE777490ED; Wed, 10 Sep 2014 14:09:13 -0700 (PDT) From: Keith Packard To: xorg-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Wed, 10 Sep 2014 14:09:09 -0700 Message-Id: <1410383349-27678-3-git-send-email-keithp@keithp.com> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1410383349-27678-1-git-send-email-keithp@keithp.com> References: <1410383349-27678-1-git-send-email-keithp@keithp.com> Subject: [Intel-gfx] [PATCH 2/2] Correct BO allocation alignment X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-6.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP BO allocations for pixmaps must be aligned to the tile height, but at some point the code was changed to align them to twice the tile height. This overallocates pixmaps, wasting memory, but more importantly, for buffers allocated by DRM and shared through DRI3, the stricter alignment check causes sharing to fail. From reading through the history of the code and related bugs, it seems like this change was part of a set of changes trying to address what turned out to be a kernel regression. Reverting this change solves the DRI3 problem and saves a bit of memory for pixmap allocations. Signed-off-by: Keith Packard --- src/uxa/intel_uxa.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/uxa/intel_uxa.c b/src/uxa/intel_uxa.c index d33eca5..4ce6eae 100644 --- a/src/uxa/intel_uxa.c +++ b/src/uxa/intel_uxa.c @@ -206,7 +206,7 @@ intel_uxa_compute_size(struct intel_screen_private *intel, tile_height = 8; else tile_height = 32; - aligned_h = ALIGN(h, 2*tile_height); + aligned_h = ALIGN(h, tile_height); *stride = intel_get_fence_pitch(intel, ALIGN(pitch, 512), @@ -768,7 +768,7 @@ free_priv: else height = 32; - height = ALIGN(pixmap->drawable.height, 2*height); + height = ALIGN(pixmap->drawable.height, height); size = intel_get_fence_size(intel, priv->stride * height); } else size = priv->stride * pixmap->drawable.height;