From patchwork Fri Sep 12 18:25:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Reese, Armin C" X-Patchwork-Id: 4897561 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5DE84BEEA5 for ; Fri, 12 Sep 2014 18:26:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E027B2026F for ; Fri, 12 Sep 2014 18:26:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 32E1120220 for ; Fri, 12 Sep 2014 18:26:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 72CAF6E058; Fri, 12 Sep 2014 11:26:44 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 44F9C6E058 for ; Fri, 12 Sep 2014 11:26:43 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 12 Sep 2014 11:26:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,514,1406617200"; d="scan'208";a="590570473" Received: from acreese-hsw.fm.intel.com ([10.19.123.60]) by fmsmga001.fm.intel.com with ESMTP; 12 Sep 2014 11:26:41 -0700 From: armin.c.reese@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Sep 2014 11:25:14 -0700 Message-Id: <1410546316-13138-1-git-send-email-armin.c.reese@intel.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/3] drm/i915 Add golden context support for Gen9 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-6.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Armin Reese This patch includes the Gen9 batch buffer to generate a 'golden context' for that product family. Also: 1) IS_GEN9 macro has been added to drivers/gpu/drm/i915/i915_drv.h 2) drivers/gpu/drm/i915/intel_renderstate_gen8.c has been updated to the version created by IGT null_state_gen Signed-off-by: Armin Reese --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_render_state.c | 2 + drivers/gpu/drm/i915/intel_renderstate.h | 1 + drivers/gpu/drm/i915/intel_renderstate_gen6.c | 23 + drivers/gpu/drm/i915/intel_renderstate_gen7.c | 23 + drivers/gpu/drm/i915/intel_renderstate_gen8.c | 831 +++++++++++++++++----- drivers/gpu/drm/i915/intel_renderstate_gen9.c | 981 ++++++++++++++++++++++++++ 8 files changed, 1699 insertions(+), 166 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_renderstate_gen9.c diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index c1dd485..2caf4f4 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -38,7 +38,8 @@ i915-y += i915_cmd_parser.o \ # autogenerated null render state i915-y += intel_renderstate_gen6.o \ intel_renderstate_gen7.o \ - intel_renderstate_gen8.o + intel_renderstate_gen8.o \ + intel_renderstate_gen9.o # modesetting core code i915-y += intel_bios.o \ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 17dfce0..7d9f091 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2122,6 +2122,7 @@ struct drm_i915_cmd_table { #define IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6) #define IS_GEN7(dev) (INTEL_INFO(dev)->gen == 7) #define IS_GEN8(dev) (INTEL_INFO(dev)->gen == 8) +#define IS_GEN9(dev) (INTEL_INFO(dev)->gen == 9) #define RENDER_RING (1<