diff mbox

[6/9] drm/i915: Dsipll clk to be enabled for DSI1 in case of dual link configuration

Message ID 1411548418-26525-7-git-send-email-gaurav.k.singh@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Gaurav K Singh Sept. 24, 2014, 8:46 a.m. UTC 
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_pll.c |   14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

Comments

Jani Nikula Sept. 24, 2014, 9:34 a.m. UTC | #1 
On Wed, 24 Sep 2014, Gaurav K Singh <gaurav.k.singh@intel.com> wrote:
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi_pll.c |   14 ++++++++------
>  1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index fa7a6ca..2464089 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -243,6 +243,9 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
>  
>  	dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
>  
> +	if (intel_dsi->dual_link)
> +		dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL;
> +
>  	DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",
>  		      dsi_mnp.dsi_pll_div, dsi_mnp.dsi_pll_ctrl);
>  
> @@ -271,12 +274,11 @@ void vlv_enable_dsi_pll(struct intel_encoder *encoder)
>  
>  	mutex_unlock(&dev_priv->dpio_lock);
>  
> -	if (wait_for(I915_READ(PIPECONF(PIPE_A)) & PIPECONF_DSI_PLL_LOCKED, 20)) {
> -		DRM_ERROR("DSI PLL lock failed\n");
> -		return;
> -	}
> -
> -	DRM_DEBUG_KMS("DSI PLL locked\n");
> +	tmp = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);

Is there no need to wait for some timeout for the pll to lock?

> +	if (tmp & DSI_PLL_LOCK)
> +		DRM_DEBUG_KMS("DSI PLL locked\n");
> +	else
> +		DRM_DEBUG_KMS("DSI PLL lock failed\n");

Please keep the happy day scenario without indent, and bail out on the
fail paths.

>  }
>  
>  void vlv_disable_dsi_pll(struct intel_encoder *encoder)
> -- 
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index fa7a6ca..2464089 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -243,6 +243,9 @@  static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
 
 	dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
 
+	if (intel_dsi->dual_link)
+		dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL;
+
 	DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",
 		      dsi_mnp.dsi_pll_div, dsi_mnp.dsi_pll_ctrl);
 
@@ -271,12 +274,11 @@  void vlv_enable_dsi_pll(struct intel_encoder *encoder)
 
 	mutex_unlock(&dev_priv->dpio_lock);
 
-	if (wait_for(I915_READ(PIPECONF(PIPE_A)) & PIPECONF_DSI_PLL_LOCKED, 20)) {
-		DRM_ERROR("DSI PLL lock failed\n");
-		return;
-	}
-
-	DRM_DEBUG_KMS("DSI PLL locked\n");
+	tmp = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);
+	if (tmp & DSI_PLL_LOCK)
+		DRM_DEBUG_KMS("DSI PLL locked\n");
+	else
+		DRM_DEBUG_KMS("DSI PLL lock failed\n");
 }
 
 void vlv_disable_dsi_pll(struct intel_encoder *encoder)