From patchwork Thu Oct 9 16:54:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 5060011 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7B70BC11AC for ; Thu, 9 Oct 2014 16:56:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9A286201FB for ; Thu, 9 Oct 2014 16:56:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id ACCD4201FE for ; Thu, 9 Oct 2014 16:56:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B9986E3A6; Thu, 9 Oct 2014 09:56:54 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id A3FF06E3A6 for ; Thu, 9 Oct 2014 09:56:52 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 09 Oct 2014 09:50:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,686,1406617200"; d="scan'208";a="586157178" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.93]) by orsmga001.jf.intel.com with ESMTP; 09 Oct 2014 09:53:11 -0700 Received: by rosetta (Postfix, from userid 1000) id 2347B80054; Thu, 9 Oct 2014 19:54:44 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Thu, 9 Oct 2014 19:54:35 +0300 Message-Id: <1412873679-7895-2-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1412873679-7895-1-git-send-email-mika.kuoppala@intel.com> References: <1412873679-7895-1-git-send-email-mika.kuoppala@intel.com> Subject: [Intel-gfx] [PATCH 2/6] tools/null_state_gen: Add more debug output X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Be more verbose about the state size we generate. Signed-off-by: Mika Kuoppala --- tools/null_state_gen/intel_null_state_gen.c | 36 ++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/tools/null_state_gen/intel_null_state_gen.c b/tools/null_state_gen/intel_null_state_gen.c index c72796b..353556a 100644 --- a/tools/null_state_gen/intel_null_state_gen.c +++ b/tools/null_state_gen/intel_null_state_gen.c @@ -32,8 +32,6 @@ #include "intel_batchbuffer.h" -#define STATE_ALIGN 64 - extern int gen6_setup_null_render_state(struct intel_batchbuffer *batch); extern int gen7_setup_null_render_state(struct intel_batchbuffer *batch); extern int gen8_setup_null_render_state(struct intel_batchbuffer *batch); @@ -47,36 +45,52 @@ static void print_usage(char *s) s); } +/* Creates the intel_renderstate_genX.c file for the particular + * GEN product + */ static int print_state(int gen, struct intel_batchbuffer *batch) { int i; + unsigned long cmds; + + fprintf(stderr, "Generating for gen%d\n", gen); printf("#include \"intel_renderstate.h\"\n\n"); + /* Relocation offsets. These are byte offsets in the golden context + * batch buffer where the BB graphics address will be added to + * the indirect state offset already stored in those locations. The + * resulting value will inform the GPU where the indirect states are. + */ printf("static const u32 gen%d_null_state_relocs[] = {\n", gen); for (i = 0; i < batch->cmds->num_items; i++) { if (intel_batch_is_reloc(batch, i)) printf("\t0x%08x,\n", i * 4); } - printf("\t%d,\n", -1); - printf("};\n\n"); + printf("\t-1,\n};\n\n"); + /* GPU commands to execute to set up the RCS golden state. This + * state will become the default config. + */ printf("static const u32 gen%d_null_state_batch[] = {\n", gen); for (i = 0; i < intel_batch_num_cmds(batch); i++) { + const int offset = i * 4; const struct bb_item *cmd = intel_batch_cmd_get(batch, i); printf("\t0x%08x,", cmd->data); if (debug) - printf("\t /* 0x%08x %s '%s' */", i * 4, - intel_batch_type_as_str(cmd), cmd->str); + printf("\t /* 0x%08x %s '%s' */", offset, + intel_batch_type_as_str(cmd), cmd->str); - if (i * 4 == batch->cmds_end_offset) + if (offset == batch->cmds_end_offset) { + cmds = i + 1; printf("\t /* cmds end */"); + } if (intel_batch_is_reloc(batch, i)) printf("\t /* reloc */"); - if (i * 4 == batch->state_start_offset) + if (offset == batch->state_start_offset) printf("\t /* state start */"); if (i == intel_batch_num_cmds(batch) - 1) @@ -87,9 +101,15 @@ static int print_state(int gen, struct intel_batchbuffer *batch) printf("};\n\nRO_RENDERSTATE(%d);\n", gen); + fprintf(stderr, "Commands %lu (%lu bytes)\n", cmds, cmds * 4); + fprintf(stderr, "State %lu (%lu bytes)\n", batch->state->num_items, batch->state->num_items * 4); + fprintf(stderr, "Total %lu (%lu bytes)\n", batch->cmds->num_items, batch->cmds->num_items * 4); + fprintf(stderr, "\n"); + return 0; } +/* Selects generator function for the given product and executes it. */ static int do_generate(int gen) { struct intel_batchbuffer *batch;