From patchwork Wed Oct 15 09:48:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Hoath X-Patchwork-Id: 5084691 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4A1EBC11AC for ; Wed, 15 Oct 2014 09:49:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D2B8120127 for ; Wed, 15 Oct 2014 09:49:14 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 78BB020123 for ; Wed, 15 Oct 2014 09:49:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DC0646E14A; Wed, 15 Oct 2014 02:49:12 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B8DD26E14A for ; Wed, 15 Oct 2014 02:49:11 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 15 Oct 2014 02:48:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,723,1406617200"; d="scan'208";a="589297049" Received: from nthoath-linux.isw.intel.com ([10.102.226.65]) by orsmga001.jf.intel.com with ESMTP; 15 Oct 2014 02:48:50 -0700 From: Nick Hoath To: intel-gfx@lists.freedesktop.org Date: Wed, 15 Oct 2014 10:48:34 +0100 Message-Id: <1413366514-12115-1-git-send-email-nicholas.hoath@intel.com> X-Mailer: git-send-email 2.1.1 Subject: [Intel-gfx] [RFC] drm/i915: Remove FIXME_lrc_ctx backpointer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The first pass implementation of execlists required a backpointer to the context to be held in the intel_ringbuffer. However the context pointer is available higher in the call stack. Remove the backpointer from the ring buffer structure and instead pass it down through the call stack. Signed-off-by: Nick Hoath CC: Chris Harris --- drivers/gpu/drm/i915/i915_gem.c | 7 ++-- drivers/gpu/drm/i915/intel_lrc.c | 65 ++++++++++++++++++++------------- drivers/gpu/drm/i915/intel_lrc.h | 10 +++-- drivers/gpu/drm/i915/intel_ringbuffer.h | 14 +++---- 4 files changed, 56 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index e9c783d..724bbdf 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2322,6 +2322,7 @@ int __i915_add_request(struct intel_engine_cs *ring, struct drm_i915_gem_request *request; struct intel_ringbuffer *ringbuf; u32 request_ring_position, request_start; + struct intel_context *ctx = NULL; int ret; request = ring->preallocated_lazy_request; @@ -2329,7 +2330,7 @@ int __i915_add_request(struct intel_engine_cs *ring, return -ENOMEM; if (i915.enable_execlists) { - struct intel_context *ctx = request->ctx; + ctx = request->ctx; ringbuf = ctx->engine[ring->id].ringbuf; } else ringbuf = ring->buffer; @@ -2343,7 +2344,7 @@ int __i915_add_request(struct intel_engine_cs *ring, * what. */ if (i915.enable_execlists) { - ret = logical_ring_flush_all_caches(ringbuf); + ret = logical_ring_flush_all_caches(ringbuf, ctx); if (ret) return ret; } else { @@ -2360,7 +2361,7 @@ int __i915_add_request(struct intel_engine_cs *ring, request_ring_position = intel_ring_get_tail(ringbuf); if (i915.enable_execlists) { - ret = ring->emit_request(ringbuf); + ret = ring->emit_request(ringbuf, ctx); if (ret) return ret; } else { diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 803fc38..1be836a 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -578,7 +578,8 @@ static int execlists_context_queue(struct intel_engine_cs *ring, return 0; } -static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf) +static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx) { struct intel_engine_cs *ring = ringbuf->ring; uint32_t flush_domains; @@ -588,7 +589,8 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf) if (ring->gpu_caches_dirty) flush_domains = I915_GEM_GPU_DOMAINS; - ret = ring->emit_flush(ringbuf, I915_GEM_GPU_DOMAINS, flush_domains); + ret = ring->emit_flush(ringbuf, ctx, + I915_GEM_GPU_DOMAINS, flush_domains); if (ret) return ret; @@ -597,6 +599,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf) } static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, struct list_head *vmas) { struct intel_engine_cs *ring = ringbuf->ring; @@ -624,7 +627,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf, /* Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. */ - return logical_ring_invalidate_all_caches(ringbuf); + return logical_ring_invalidate_all_caches(ringbuf, ctx); } /** @@ -704,13 +707,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file, return -EINVAL; } - ret = execlists_move_to_gpu(ringbuf, vmas); + ret = execlists_move_to_gpu(ringbuf, ctx, vmas); if (ret) return ret; if (ring == &dev_priv->ring[RCS] && instp_mode != dev_priv->relative_constants_mode) { - ret = intel_logical_ring_begin(ringbuf, 4); + ret = intel_logical_ring_begin(ringbuf, ctx, 4); if (ret) return ret; @@ -723,7 +726,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file, dev_priv->relative_constants_mode = instp_mode; } - ret = ring->emit_bb_start(ringbuf, exec_start, flags); + ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags); if (ret) return ret; @@ -755,7 +758,8 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring) I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING)); } -int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf) +int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx) { struct intel_engine_cs *ring = ringbuf->ring; int ret; @@ -763,7 +767,7 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf) if (!ring->gpu_caches_dirty) return 0; - ret = ring->emit_flush(ringbuf, 0, I915_GEM_GPU_DOMAINS); + ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS); if (ret) return ret; @@ -780,10 +784,10 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf) * on a queue waiting for the ELSP to be ready to accept a new context submission. At that * point, the tail *inside* the context is updated and the ELSP written to. */ -void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf) +void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx) { struct intel_engine_cs *ring = ringbuf->ring; - struct intel_context *ctx = ringbuf->FIXME_lrc_ctx; intel_logical_ring_advance(ringbuf); @@ -860,6 +864,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf, } static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, int bytes) { struct intel_engine_cs *ring = ringbuf->ring; @@ -873,7 +878,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf, return ret; /* Force the context submission in case we have been skipping it */ - intel_logical_ring_advance_and_submit(ringbuf); + intel_logical_ring_advance_and_submit(ringbuf, ctx); /* With GEM the hangcheck timer should kick us out of the loop, * leaving it early runs the risk of corrupting GEM state (due @@ -911,13 +916,14 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf, return ret; } -static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf) +static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx) { uint32_t __iomem *virt; int rem = ringbuf->size - ringbuf->tail; if (ringbuf->space < rem) { - int ret = logical_ring_wait_for_space(ringbuf, rem); + int ret = logical_ring_wait_for_space(ringbuf, ctx, rem); if (ret) return ret; @@ -934,18 +940,19 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf) return 0; } -static int logical_ring_prepare(struct intel_ringbuffer *ringbuf, int bytes) +static int logical_ring_prepare(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, int bytes) { int ret; if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) { - ret = logical_ring_wrap_buffer(ringbuf); + ret = logical_ring_wrap_buffer(ringbuf, ctx); if (unlikely(ret)) return ret; } if (unlikely(ringbuf->space < bytes)) { - ret = logical_ring_wait_for_space(ringbuf, bytes); + ret = logical_ring_wait_for_space(ringbuf, ctx, bytes); if (unlikely(ret)) return ret; } @@ -966,7 +973,9 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf, int bytes) * * Return: non-zero if the ringbuffer is not ready to be written to. */ -int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords) +int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, + int num_dwords) { struct intel_engine_cs *ring = ringbuf->ring; struct drm_device *dev = ring->dev; @@ -978,12 +987,12 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords) if (ret) return ret; - ret = logical_ring_prepare(ringbuf, num_dwords * sizeof(uint32_t)); + ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t)); if (ret) return ret; /* Preallocate the olr before touching the ring */ - ret = logical_ring_alloc_seqno(ring, ringbuf->FIXME_lrc_ctx); + ret = logical_ring_alloc_seqno(ring, ctx); if (ret) return ret; @@ -1038,12 +1047,13 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring) } static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, u64 offset, unsigned flags) { bool ppgtt = !(flags & I915_DISPATCH_SECURE); int ret; - ret = intel_logical_ring_begin(ringbuf, 4); + ret = intel_logical_ring_begin(ringbuf, ctx, 4); if (ret) return ret; @@ -1091,6 +1101,7 @@ static void gen8_logical_ring_put_irq(struct intel_engine_cs *ring) } static int gen8_emit_flush(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, u32 invalidate_domains, u32 unused) { @@ -1100,7 +1111,7 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf, uint32_t cmd; int ret; - ret = intel_logical_ring_begin(ringbuf, 4); + ret = intel_logical_ring_begin(ringbuf, ctx, 4); if (ret) return ret; @@ -1129,6 +1140,7 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf, } static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, u32 invalidate_domains, u32 flush_domains) { @@ -1155,7 +1167,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf, flags |= PIPE_CONTROL_GLOBAL_GTT_IVB; } - ret = intel_logical_ring_begin(ringbuf, 6); + ret = intel_logical_ring_begin(ringbuf, ctx, 6); if (ret) return ret; @@ -1180,13 +1192,14 @@ static void gen8_set_seqno(struct intel_engine_cs *ring, u32 seqno) intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno); } -static int gen8_emit_request(struct intel_ringbuffer *ringbuf) +static int gen8_emit_request(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx) { struct intel_engine_cs *ring = ringbuf->ring; u32 cmd; int ret; - ret = intel_logical_ring_begin(ringbuf, 6); + ret = intel_logical_ring_begin(ringbuf, ctx, 6); if (ret) return ret; @@ -1201,7 +1214,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf) intel_logical_ring_emit(ringbuf, ring->outstanding_lazy_seqno); intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT); intel_logical_ring_emit(ringbuf, MI_NOOP); - intel_logical_ring_advance_and_submit(ringbuf); + intel_logical_ring_advance_and_submit(ringbuf, ctx); return 0; } @@ -1474,6 +1487,7 @@ int intel_lr_context_render_state_init(struct intel_engine_cs *ring, return 0; ret = ring->emit_bb_start(ringbuf, + ctx, so.ggtt_offset, I915_DISPATCH_SECURE); if (ret) @@ -1702,7 +1716,6 @@ int intel_lr_context_deferred_create(struct intel_context *ctx, } ringbuf->ring = ring; - ringbuf->FIXME_lrc_ctx = ctx; ringbuf->size = 32 * PAGE_SIZE; ringbuf->effective_size = ringbuf->size; diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h index 33c3b4b..ee647db 100644 --- a/drivers/gpu/drm/i915/intel_lrc.h +++ b/drivers/gpu/drm/i915/intel_lrc.h @@ -36,8 +36,10 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring); void intel_logical_ring_cleanup(struct intel_engine_cs *ring); int intel_logical_rings_init(struct drm_device *dev); -int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf); -void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf); +int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx); +void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx); /** * intel_logical_ring_advance() - advance the ringbuffer tail * @ringbuf: Ringbuffer to advance. @@ -59,7 +61,9 @@ static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf, iowrite32(data, ringbuf->virtual_start + ringbuf->tail); ringbuf->tail += 4; } -int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords); +int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, + int num_dwords); /* Logical Ring Contexts */ int intel_lr_context_render_state_init(struct intel_engine_cs *ring, diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 96479c8..5cd09d3 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -99,13 +99,6 @@ struct intel_ringbuffer { struct intel_engine_cs *ring; - /* - * FIXME: This backpointer is an artifact of the history of how the - * execlist patches came into being. It will get removed once the basic - * code has landed. - */ - struct intel_context *FIXME_lrc_ctx; - u32 head; u32 tail; int space; @@ -123,6 +116,8 @@ struct intel_ringbuffer { u32 last_retired_head; }; +struct intel_context; + struct intel_engine_cs { const char *name; enum intel_ring_id { @@ -237,11 +232,14 @@ struct intel_engine_cs { struct list_head execlist_queue; u8 next_context_status_buffer; u32 irq_keep_mask; /* bitmask for interrupts that should not be masked */ - int (*emit_request)(struct intel_ringbuffer *ringbuf); + int (*emit_request)(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx); int (*emit_flush)(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, u32 invalidate_domains, u32 flush_domains); int (*emit_bb_start)(struct intel_ringbuffer *ringbuf, + struct intel_context *ctx, u64 offset, unsigned flags); /**