From patchwork Mon Oct 27 19:54:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 5166101 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1218FC11AC for ; Mon, 27 Oct 2014 19:55:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 19D932020E for ; Mon, 27 Oct 2014 19:55:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 19047201E4 for ; Mon, 27 Oct 2014 19:54:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E63146E254; Mon, 27 Oct 2014 12:54:57 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qg0-f49.google.com (mail-qg0-f49.google.com [209.85.192.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 623D46E254 for ; Mon, 27 Oct 2014 12:54:57 -0700 (PDT) Received: by mail-qg0-f49.google.com with SMTP id e89so4545232qgf.22 for ; Mon, 27 Oct 2014 12:54:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bUA53ms0U57FzX02f3pR/UYfp8t0pow+bHT0wsjr91E=; b=D0UQlk7neVkIk933OExFI9H025nbad5Ob9NdPyK+ho0BS+QvXad8WdMbvG2DaLUZsz gtHGlXAExjxaPg7bZSI7FS6Az2aCvOKxuEyKViaJ/t2JESL903A5PWsFROBXtwQWo1Em hfBz/2qFmdSiGDJppca/9Tn/1xQqtyhccnB0YLDcv3SEhL/+Xz8Z6sqbLUYVjI6lte6Q rUcc2n702qqMmlsH68SUt8MOS1zxX9HHJdh4/ltp1HJllP8J5vf6Gs+HD1749izUeGe8 71qDyi8ErpDlFNcqy5O3sDWb1K9CkgwQ5mfLy1+d9axp1AIyeSaWxKLqIkFAfeBzpOvc ZNyA== X-Received: by 10.140.83.7 with SMTP id i7mr35326343qgd.14.1414439694408; Mon, 27 Oct 2014 12:54:54 -0700 (PDT) Received: from localhost.localdomain ([177.16.188.126]) by mx.google.com with ESMTPSA id g94sm11958088qgd.0.2014.10.27.12.54.52 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Oct 2014 12:54:53 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Mon, 27 Oct 2014 17:54:32 -0200 Message-Id: <1414439673-1994-1-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <20141023121346.GG26941@phenom.ffwll.local> References: <20141023121346.GG26941@phenom.ffwll.local> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 1/2] drm/i915: kill intel_resume_prepare() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni Because, really, the abstraction is not working for us. It is nice for VLV, but doesn't add anything useful on SNB/HSW/BDW. We want to change this code due to a recently-discovered bug, but we can't seem to find a nice solution that repects the current abstraction. So let's kill intel_resume_prepare() and its friends, and add an equivalent implementation to both its callers. Also, look at the diffstat! v2: - Rebase. Signed-off-by: Paulo Zanoni Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/i915_drv.c | 63 ++++++++++------------------------------- 1 file changed, 15 insertions(+), 48 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 035ec94..33b6fc4 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -551,8 +551,8 @@ static void intel_suspend_encoders(struct drm_i915_private *dev_priv) } static int intel_suspend_complete(struct drm_i915_private *dev_priv); -static int intel_resume_prepare(struct drm_i915_private *dev_priv, - bool rpm_resume); +static int vlv_resume_prepare(struct drm_i915_private *dev_priv, + bool rpm_resume); static int i915_drm_suspend(struct drm_device *dev) { @@ -744,7 +744,7 @@ static int i915_drm_resume(struct drm_device *dev) static int i915_drm_resume_early(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - int ret; + int ret = 0; /* * We have a resume ordering issue with the snd-hda driver also @@ -760,7 +760,10 @@ static int i915_drm_resume_early(struct drm_device *dev) pci_set_master(dev->pdev); - ret = intel_resume_prepare(dev_priv, false); + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) + hsw_disable_pc8(dev_priv); + else if (IS_VALLEYVIEW(dev_priv)) + ret = vlv_resume_prepare(dev_priv, false); if (ret) DRM_ERROR("Resume prepare failed: %d,Continuing resume\n", ret); @@ -986,25 +989,6 @@ static int hsw_suspend_complete(struct drm_i915_private *dev_priv) return 0; } -static int snb_resume_prepare(struct drm_i915_private *dev_priv, - bool rpm_resume) -{ - struct drm_device *dev = dev_priv->dev; - - if (rpm_resume) - intel_init_pch_refclk(dev); - - return 0; -} - -static int hsw_resume_prepare(struct drm_i915_private *dev_priv, - bool rpm_resume) -{ - hsw_disable_pc8(dev_priv); - - return 0; -} - /* * Save all Gunit registers that may be lost after a D3 and a subsequent * S0i[R123] transition. The list of registers needing a save/restore is @@ -1462,7 +1446,7 @@ static int intel_runtime_resume(struct device *device) struct pci_dev *pdev = to_pci_dev(device); struct drm_device *dev = pci_get_drvdata(pdev); struct drm_i915_private *dev_priv = dev->dev_private; - int ret; + int ret = 0; if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev))) return -ENODEV; @@ -1472,7 +1456,13 @@ static int intel_runtime_resume(struct device *device) intel_opregion_notify_adapter(dev, PCI_D0); dev_priv->pm.suspended = false; - ret = intel_resume_prepare(dev_priv, true); + if (IS_GEN6(dev_priv)) + intel_init_pch_refclk(dev); + else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) + hsw_disable_pc8(dev_priv); + else if (IS_VALLEYVIEW(dev_priv)) + ret = vlv_resume_prepare(dev_priv, true); + /* * No point of rolling back things in case of an error, as the best * we can do is to hope that things will still work (and disable RPM). @@ -1510,29 +1500,6 @@ static int intel_suspend_complete(struct drm_i915_private *dev_priv) return ret; } -/* - * This function implements common functionality of runtime and system - * resume sequence. Variable rpm_resume used for implementing different - * code paths. - */ -static int intel_resume_prepare(struct drm_i915_private *dev_priv, - bool rpm_resume) -{ - struct drm_device *dev = dev_priv->dev; - int ret; - - if (IS_GEN6(dev)) - ret = snb_resume_prepare(dev_priv, rpm_resume); - else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) - ret = hsw_resume_prepare(dev_priv, rpm_resume); - else if (IS_VALLEYVIEW(dev)) - ret = vlv_resume_prepare(dev_priv, rpm_resume); - else - ret = 0; - - return ret; -} - static const struct dev_pm_ops i915_pm_ops = { /* * S0ix (via system suspend) and S3 event handlers [PMSG_SUSPEND,