From patchwork Wed Oct 29 10:26:12 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 5183371 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 04C6EC11AC for ; Wed, 29 Oct 2014 02:26:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 387AC2015D for ; Wed, 29 Oct 2014 02:26:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 25C7220158 for ; Wed, 29 Oct 2014 02:26:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F7A06E3B4; Tue, 28 Oct 2014 19:26:28 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 62D556E3B4 for ; Tue, 28 Oct 2014 19:26:27 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 28 Oct 2014 19:26:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,807,1406617200"; d="scan'208";a="627334786" Received: from sdp-inno.bj.intel.com ([10.238.154.84]) by orsmga002.jf.intel.com with ESMTP; 28 Oct 2014 19:26:25 -0700 From: Zhi Wang To: intel-gfx@lists.freedesktop.org Date: Wed, 29 Oct 2014 18:26:12 +0800 Message-Id: <1414578372-2902-1-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.8.3.2 Subject: [Intel-gfx] [PATCH] drm/i915: Add missed MI_BATCH_BUFFER_END in null state batch buffer. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00, DATE_IN_FUTURE_06_12, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently MI_BATCH_BUFFER_END is missed in null state batch buffer. This fix is trying to append the missed instruction at the end of null state batch buffer gem bo after it was initialized and filled with null state commands. This issue was exposed under full GPU virtualization(Intel GVT-g) environment. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/i915_gem_render_state.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c index 98dcd94..3495b4b 100644 --- a/drivers/gpu/drm/i915/i915_gem_render_state.c +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c @@ -54,7 +54,8 @@ static int render_state_init(struct render_state *so, struct drm_device *dev) if (so->rodata == NULL) return 0; - if (so->rodata->batch_items * 4 > 4096) + /* Leave one dword for MI_BATCH_BUFFER_END. */ + if ((so->rodata->batch_items * 4 + 1) > 4096) return -EINVAL; so->obj = i915_gem_alloc_object(dev, 4096); @@ -108,6 +109,7 @@ static int render_state_setup(struct render_state *so) d[i++] = s; } + d[i] = MI_BATCH_BUFFER_END; kunmap(page); ret = i915_gem_object_set_to_gtt_domain(so->obj, false);