From patchwork Thu Oct 30 18:54:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 5199951 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0D395C11AC for ; Thu, 30 Oct 2014 18:54:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 47ED4201DD for ; Thu, 30 Oct 2014 18:54:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6B7A22015A for ; Thu, 30 Oct 2014 18:54:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0BAD86E523; Thu, 30 Oct 2014 11:54:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pd0-f170.google.com (mail-pd0-f170.google.com [209.85.192.170]) by gabe.freedesktop.org (Postfix) with ESMTP id 9C1926E56A for ; Thu, 30 Oct 2014 11:54:18 -0700 (PDT) Received: by mail-pd0-f170.google.com with SMTP id z10so5710751pdj.29 for ; Thu, 30 Oct 2014 11:54:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OG/dLiFhdoPWONBWUggIISmdbnfZmpW0TVO9PXGv9Fc=; b=C+2tJEQqkFJIohFSGmaV0ZOtGW40lZCcMU8n2ELsqdHES59k2wWf42VI8/LJF7Vcf+ 1J2wDatn1IkOaFwoFykLYklUdd8rwVP7mWpPsoi/UPLBpuE5CqjbkHJa86H4TH4NVsay 6KWXCUidy08drwF5Wdmi1VavAKD1aFcXj2CeQuwB0heu0UcE9CZEgjiWJ8hnDDVoMLvE K2JdEZGrBwj4quC5UKLiJQc00ZmCrU2Kl63y6d3nOnhBlsgxGWiC7XBWDOedZriW0GlD 72lHWq8StX2gJdYY6uZT1PPn2GPv67qg1xAZMKP9zNEJb0IQAAHgGDuvntWkUZ+XmeQB S6lA== X-Received: by 10.66.191.8 with SMTP id gu8mr19403121pac.126.1414695258415; Thu, 30 Oct 2014 11:54:18 -0700 (PDT) Received: from jbarnes-t420.intel.com (c-67-161-37-189.hsd1.ca.comcast.net. [67.161.37.189]) by mx.google.com with ESMTPSA id k9sm7828118pdj.41.2014.10.30.11.54.17 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Oct 2014 11:54:17 -0700 (PDT) From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Thu, 30 Oct 2014 11:54:03 -0700 Message-Id: <1414695244-14159-5-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414695244-14159-1-git-send-email-jbarnes@virtuousgeek.org> References: <1414695244-14159-1-git-send-email-jbarnes@virtuousgeek.org> Cc: shuang.he@linux.intel.com Subject: [Intel-gfx] [PATCH 5/6] drm/i915: update pipe size at set_config time X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This only affects the fastboot path as-is. In that case, we simply need to make sure that we update the pipe size at the first mode set. Rather than putting it off until we decide to flip (if indeed we do end up flipping), update the pipe size as appropriate a bit earlier in the set_config call. This sets us up for better pipe tracking in later patches. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2199a9a..470cdac 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2902,8 +2902,6 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, return ret; } - intel_update_pipe_size(intel_crtc); - dev_priv->display.update_primary_plane(crtc, fb, x, y); if (intel_crtc->active) @@ -11491,6 +11489,7 @@ static int intel_crtc_set_config(struct drm_mode_set *set) to_intel_crtc(set->crtc)->config.has_infoframe) config->mode_changed = true; + intel_update_pipe_size(to_intel_crtc(set->crtc)); if (config->mode_changed) { ret = intel_set_mode_pipes(set->crtc, set->mode,