| Message ID | 1415983961-4485-13-git-send-email-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
>-----Original Message----- >From: Vivi, Rodrigo >Sent: Friday, November 14, 2014 10:23 PM >To: intel-gfx@lists.freedesktop.org >Cc: Vivi, Rodrigo; R, Durgadoss >Subject: [PATCH 13/15] drm/i915: VLV/CHV PSR: Increase wait delay time before active PSR. > >Since active function on VLV immediately activate PSR let's give more >time for idleness. > >v2: Rebase over intel_psr.c and fix typo. > >Cc: Durgadoss R <durgadoss.r@intel.com> >Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> >--- > drivers/gpu/drm/i915/intel_psr.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c >index b2a4ee7..fe7b0f6 100644 >--- a/drivers/gpu/drm/i915/intel_psr.c >+++ b/drivers/gpu/drm/i915/intel_psr.c >@@ -618,6 +618,11 @@ void intel_psr_flush(struct drm_device *dev, > struct drm_i915_private *dev_priv = dev->dev_private; > struct drm_crtc *crtc; > enum pipe pipe; >+ /* On HSW/BDW Hardware controls idle_frames to go to PSR entry state >+ * However on VLV we go to PSR active state with psr work. So let's s/psr/PSR Reviewed-by: Durgadoss R <durgadoss.r@intel.com> Thanks, Durga >+ * wait more time and let the user experience smooth enough. >+ */ >+ int delay = msecs_to_jiffies(HAS_DDI(dev) ? 100 : 5000); > > mutex_lock(&dev_priv->psr.lock); > if (!dev_priv->psr.enabled) { >@@ -651,7 +656,7 @@ void intel_psr_flush(struct drm_device *dev, > > if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) > schedule_delayed_work(&dev_priv->psr.work, >- msecs_to_jiffies(100)); >+ msecs_to_jiffies(delay)); > mutex_unlock(&dev_priv->psr.lock); > } > >-- >1.9.3
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index b2a4ee7..fe7b0f6 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -618,6 +618,11 @@ void intel_psr_flush(struct drm_device *dev, struct drm_i915_private *dev_priv = dev->dev_private; struct drm_crtc *crtc; enum pipe pipe; + /* On HSW/BDW Hardware controls idle_frames to go to PSR entry state + * However on VLV we go to PSR active state with psr work. So let's + * wait more time and let the user experience smooth enough. + */ + int delay = msecs_to_jiffies(HAS_DDI(dev) ? 100 : 5000); mutex_lock(&dev_priv->psr.lock); if (!dev_priv->psr.enabled) { @@ -651,7 +656,7 @@ void intel_psr_flush(struct drm_device *dev, if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) schedule_delayed_work(&dev_priv->psr.work, - msecs_to_jiffies(100)); + msecs_to_jiffies(delay)); mutex_unlock(&dev_priv->psr.lock); }
Since active function on VLV immediately activate PSR let's give more time for idleness. v2: Rebase over intel_psr.c and fix typo. Cc: Durgadoss R <durgadoss.r@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/intel_psr.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)