From patchwork Tue Dec 23 17:16:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Thierry X-Patchwork-Id: 5534541 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2CF649F357 for ; Tue, 23 Dec 2014 17:16:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 16F1120120 for ; Tue, 23 Dec 2014 17:16:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id BE904201D3 for ; Tue, 23 Dec 2014 17:16:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B8016E4FE; Tue, 23 Dec 2014 09:16:34 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id C80826E4E5 for ; Tue, 23 Dec 2014 09:16:31 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 23 Dec 2014 09:13:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,633,1413270000"; d="scan'208";a="659126102" Received: from michelth-linux.isw.intel.com ([10.102.226.150]) by orsmga002.jf.intel.com with ESMTP; 23 Dec 2014 09:16:30 -0800 From: Michel Thierry To: intel-gfx@lists.freedesktop.org Date: Tue, 23 Dec 2014 17:16:25 +0000 Message-Id: <1419354987-4622-23-git-send-email-michel.thierry@intel.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1419354987-4622-1-git-send-email-michel.thierry@intel.com> References: <1418922621-25818-1-git-send-email-michel.thierry@intel.com> <1419354987-4622-1-git-send-email-michel.thierry@intel.com> Subject: [Intel-gfx] [PATCH v2 22/24] drm/i915/bdw: begin bitmap tracking X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ben Widawsky Like with gen6/7, we can enable bitmap tracking with all the preallocations to make sure things actually don't blow up. Signed-off-by: Ben Widawsky Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_gtt.c | 121 +++++++++++++++++++++++++----------- drivers/gpu/drm/i915/i915_gem_gtt.h | 24 +++++++ 2 files changed, 108 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index ff3aac5..6254677 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -417,8 +417,12 @@ err_out: static void __free_pd_single(struct i915_pagedir *pd, struct drm_device *dev) { + WARN(!bitmap_empty(pd->used_pdes, GEN8_PDES_PER_PAGE), + "Free page directory with %d used pages\n", + bitmap_weight(pd->used_pdes, GEN8_PDES_PER_PAGE)); i915_dma_unmap_single(pd, dev); __free_page(pd->page); + kfree(pd->used_pdes); kfree(pd); } @@ -431,26 +435,35 @@ static void __free_pd_single(struct i915_pagedir *pd, struct drm_device *dev) static struct i915_pagedir *alloc_pd_single(struct drm_device *dev) { struct i915_pagedir *pd; - int ret; + int ret = -ENOMEM; pd = kzalloc(sizeof(*pd), GFP_KERNEL); if (!pd) return ERR_PTR(-ENOMEM); + pd->used_pdes = kcalloc(BITS_TO_LONGS(GEN8_PDES_PER_PAGE), + sizeof(*pd->used_pdes), GFP_KERNEL); + if (!pd->used_pdes) + goto free_pd; + pd->page = alloc_page(GFP_KERNEL | __GFP_ZERO); - if (!pd->page) { - kfree(pd); - return ERR_PTR(-ENOMEM); - } + if (!pd->page) + goto free_bitmap; ret = i915_dma_map_px_single(pd, dev); - if (ret) { - __free_page(pd->page); - kfree(pd); - return ERR_PTR(ret); - } + if (ret) + goto free_page; return pd; + +free_page: + __free_page(pd->page); +free_bitmap: + kfree(pd->used_pdes); +free_pd: + kfree(pd); + + return ERR_PTR(ret); } /* Broadwell Page Directory Pointer Descriptors */ @@ -632,36 +645,47 @@ static void gen8_teardown_va_range(struct i915_address_space *vm, gen8_for_each_pdpe(pd, &ppgtt->pdp, start, length, temp, pdpe) { uint64_t pd_len = gen8_clamp_pd(start, length); uint64_t pd_start = start; - gen8_for_each_pde(pt, pd, pd_start, pd_len, temp, pde) { - free_pt_single(pt, vm->dev); - pd->page_tables[pde] = NULL; - } - free_pd_single(pd, vm->dev); - ppgtt->pdp.pagedir[pdpe] = NULL; - } -} -static void gen8_ppgtt_unmap_pages(struct i915_hw_ppgtt *ppgtt) -{ - struct pci_dev *hwdev = ppgtt->base.dev->pdev; - int i, j; - - for (i = 0; i < GEN8_PDES_PER_PAGE; i++) { - /* TODO: In the future we'll support sparse mappings, so this - * will have to change. */ - if (!ppgtt->pdp.pagedir[i]->daddr) + /* Page directories might not be present since the macro rounds + * down, and up. + */ + if (!pd) { + WARN(test_bit(pdpe, ppgtt->pdp.used_pdpes), + "PDPE %d is not allocated, but is reserved (%p)\n", + pdpe, vm); continue; + } else { + WARN(!test_bit(pdpe, ppgtt->pdp.used_pdpes), + "PDPE %d not reserved, but is allocated (%p)", + pdpe, vm); + } - pci_unmap_page(hwdev, ppgtt->pdp.pagedir[i]->daddr, PAGE_SIZE, - PCI_DMA_BIDIRECTIONAL); + gen8_for_each_pde(pt, pd, pd_start, pd_len, temp, pde) { + if (!pt) { + WARN(test_bit(pde, pd->used_pdes), + "PDE %d is not allocated, but is reserved (%p)\n", + pde, vm); + continue; + } else + WARN(!test_bit(pde, pd->used_pdes), + "PDE %d not reserved, but is allocated (%p)", + pde, vm); + + bitmap_clear(pt->used_ptes, + gen8_pte_index(pd_start), + gen8_pte_count(pd_start, pd_len)); + + if (bitmap_empty(pt->used_ptes, GEN8_PTES_PER_PAGE)) { + free_pt_single(pt, vm->dev); + pd->page_tables[pde] = NULL; + WARN_ON(!test_and_clear_bit(pde, pd->used_pdes)); + } + } - for (j = 0; j < GEN8_PDES_PER_PAGE; j++) { - struct i915_pagedir *pd = ppgtt->pdp.pagedir[i]; - struct i915_pagetab *pt = pd->page_tables[j]; - dma_addr_t addr = pt->daddr; - if (addr) - pci_unmap_page(hwdev, addr, PAGE_SIZE, - PCI_DMA_BIDIRECTIONAL); + if (bitmap_empty(pd->used_pdes, GEN8_PDES_PER_PAGE)) { + free_pd_single(pd, vm->dev); + ppgtt->pdp.pagedir[pdpe] = NULL; + WARN_ON(!test_and_clear_bit(pdpe, ppgtt->pdp.used_pdpes)); } } } @@ -677,7 +701,6 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm) struct i915_hw_ppgtt *ppgtt = container_of(vm, struct i915_hw_ppgtt, base); - gen8_ppgtt_unmap_pages(ppgtt); gen8_ppgtt_free(ppgtt); } @@ -706,6 +729,7 @@ unwind_out: return -ENOMEM; } +/* bitmap of new pagedirs */ static int gen8_ppgtt_alloc_pagedirs(struct i915_pagedirpo *pdp, uint64_t start, uint64_t length, @@ -721,6 +745,7 @@ static int gen8_ppgtt_alloc_pagedirs(struct i915_pagedirpo *pdp, gen8_for_each_pdpe(unused, pdp, start, length, temp, pdpe) { BUG_ON(unused); pdp->pagedir[pdpe] = alloc_pd_single(dev); + if (IS_ERR(pdp->pagedir[pdpe])) goto unwind_out; } @@ -742,10 +767,12 @@ static int gen8_alloc_va_range(struct i915_address_space *vm, container_of(vm, struct i915_hw_ppgtt, base); struct i915_pagedir *pd; const uint64_t orig_start = start; + const uint64_t orig_length = length; uint64_t temp; uint32_t pdpe; int ret; + /* Do the allocations first so we can easily bail out */ ret = gen8_ppgtt_alloc_pagedirs(&ppgtt->pdp, start, length, ppgtt->base.dev); if (ret) @@ -758,6 +785,26 @@ static int gen8_alloc_va_range(struct i915_address_space *vm, goto err_out; } + /* Now mark everything we've touched as used. This doesn't allow for + * robust error checking, but it makes the code a hell of a lot simpler. + */ + start = orig_start; + length = orig_length; + + gen8_for_each_pdpe(pd, &ppgtt->pdp, start, length, temp, pdpe) { + struct i915_pagetab *pt; + uint64_t pd_len = gen8_clamp_pd(start, length); + uint64_t pd_start = start; + uint32_t pde; + gen8_for_each_pde(pt, &ppgtt->pd, pd_start, pd_len, temp, pde) { + bitmap_set(pd->page_tables[pde]->used_ptes, + gen8_pte_index(start), + gen8_pte_count(start, length)); + set_bit(pde, pd->used_pdes); + } + set_bit(pdpe, ppgtt->pdp.used_pdpes); + } + return 0; err_out: diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 4c50d87..957f2d0 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -206,11 +206,13 @@ struct i915_pagedir { dma_addr_t daddr; }; + unsigned long *used_pdes; struct i915_pagetab *page_tables[GEN6_PPGTT_PD_ENTRIES]; }; struct i915_pagedirpo { /* struct page *page; */ + DECLARE_BITMAP(used_pdpes, GEN8_LEGACY_PDPES); struct i915_pagedir *pagedir[GEN8_LEGACY_PDPES]; }; @@ -449,6 +451,28 @@ static inline uint32_t gen8_pml4e_index(uint64_t address) BUG(); /* For 64B */ } +static inline size_t gen8_pte_count(uint64_t addr, uint64_t length) +{ + return i915_pte_count(addr, length, GEN8_PDE_SHIFT); +} + +static inline size_t gen8_pde_count(uint64_t addr, uint64_t length) +{ + const uint32_t pdp_shift = GEN8_PDE_SHIFT + 9; + const uint64_t mask = ~((1 << pdp_shift) - 1); + uint64_t end; + + BUG_ON(length == 0); + BUG_ON(offset_in_page(addr|length)); + + end = addr + length; + + if ((addr & mask) != (end & mask)) + return GEN8_PDES_PER_PAGE - i915_pde_index(addr, GEN8_PDE_SHIFT); + + return i915_pde_index(end, GEN8_PDE_SHIFT) - i915_pde_index(addr, GEN8_PDE_SHIFT); +} + int i915_gem_gtt_init(struct drm_device *dev); void i915_gem_init_global_gtt(struct drm_device *dev); void i915_global_gtt_cleanup(struct drm_device *dev);