From patchwork Fri Jan 2 11:03:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: akash.goel@intel.com X-Patchwork-Id: 5558581 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6CCEDBF6C3 for ; Fri, 2 Jan 2015 10:58:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C19720166 for ; Fri, 2 Jan 2015 10:58:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E40EF2021B for ; Fri, 2 Jan 2015 10:58:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F85E6E350; Fri, 2 Jan 2015 02:58:24 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id C3B5D6E34E for ; Fri, 2 Jan 2015 02:58:22 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 02 Jan 2015 02:58:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,684,1413270000"; d="scan'208";a="663567869" Received: from akashgoe-desktop.iind.intel.com ([10.223.82.76]) by orsmga002.jf.intel.com with ESMTP; 02 Jan 2015 02:58:21 -0800 From: akash.goel@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 2 Jan 2015 16:33:33 +0530 Message-Id: <1420196614-13543-6-git-send-email-akash.goel@intel.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1420196614-13543-1-git-send-email-akash.goel@intel.com> References: <1420196614-13543-1-git-send-email-akash.goel@intel.com> Cc: daniel.vetter@ffwll.ch Subject: [Intel-gfx] [PATCH 5/6] igt/gem_concurrent_blit: Exercise wc mappings X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Chris Wilson Signed-off-by: Chris Wilson --- tests/gem_concurrent_blit.c | 233 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 198 insertions(+), 35 deletions(-) diff --git a/tests/gem_concurrent_blit.c b/tests/gem_concurrent_blit.c index 4ce5ef0..9d157b6 100644 --- a/tests/gem_concurrent_blit.c +++ b/tests/gem_concurrent_blit.c @@ -62,6 +62,12 @@ int fd, devid, gen; struct intel_batchbuffer *batch; static void +nop_release_bo(drm_intel_bo *bo) +{ + drm_intel_bo_unreference(bo); +} + +static void prw_set_bo(drm_intel_bo *bo, uint32_t val, int width, int height) { int size = width * height, i; @@ -162,6 +168,27 @@ gttX_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) } static drm_intel_bo * +wc_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) +{ + drm_intel_bo *bo; + + igt_require_mmap_wc(fd); + + bo = unmapped_create_bo(bufmgr, width, height); + bo->virtual = gem_mmap__wc(fd, bo->handle, 0, bo->size, PROT_READ | PROT_WRITE); + return bo; +} + +static void +wc_release_bo(drm_intel_bo *bo) +{ + munmap(bo->virtual, bo->size); + bo->virtual = NULL; + + nop_release_bo(bo); +} + +static drm_intel_bo * gpu_create_bo(drm_intel_bufmgr *bufmgr, int width, int height) { return unmapped_create_bo(bufmgr, width, height); @@ -274,26 +301,62 @@ gpu_cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height, drm_intel_bo * cpu_cmp_bo(tmp, val, width, height, NULL); } -struct access_mode { +const struct access_mode { + const char *name; void (*set_bo)(drm_intel_bo *bo, uint32_t val, int w, int h); void (*cmp_bo)(drm_intel_bo *bo, uint32_t val, int w, int h, drm_intel_bo *tmp); drm_intel_bo *(*create_bo)(drm_intel_bufmgr *bufmgr, int width, int height); - const char *name; -}; - -struct access_mode access_modes[] = { - { .set_bo = prw_set_bo, .cmp_bo = prw_cmp_bo, - .create_bo = unmapped_create_bo, .name = "prw" }, - { .set_bo = cpu_set_bo, .cmp_bo = cpu_cmp_bo, - .create_bo = unmapped_create_bo, .name = "cpu" }, - { .set_bo = gtt_set_bo, .cmp_bo = gtt_cmp_bo, - .create_bo = gtt_create_bo, .name = "gtt" }, - { .set_bo = gtt_set_bo, .cmp_bo = gtt_cmp_bo, - .create_bo = gttX_create_bo, .name = "gttX" }, - { .set_bo = gpu_set_bo, .cmp_bo = gpu_cmp_bo, - .create_bo = gpu_create_bo, .name = "gpu" }, - { .set_bo = gpu_set_bo, .cmp_bo = gpu_cmp_bo, - .create_bo = gpuX_create_bo, .name = "gpuX" }, + void (*release_bo)(drm_intel_bo *bo); +} access_modes[] = { + { + .name = "prw", + .set_bo = prw_set_bo, + .cmp_bo = prw_cmp_bo, + .create_bo = unmapped_create_bo, + .release_bo = nop_release_bo, + }, + { + .name = "cpu", + .set_bo = cpu_set_bo, + .cmp_bo = cpu_cmp_bo, + .create_bo = unmapped_create_bo, + .release_bo = nop_release_bo, + }, + { + .name = "gtt", + .set_bo = gtt_set_bo, + .cmp_bo = gtt_cmp_bo, + .create_bo = gtt_create_bo, + .release_bo = nop_release_bo, + }, + { + .name = "gttX", + .set_bo = gtt_set_bo, + .cmp_bo = gtt_cmp_bo, + .create_bo = gttX_create_bo, + .release_bo = nop_release_bo, + }, + { + .name = "wc", + .set_bo = gtt_set_bo, + .cmp_bo = gtt_cmp_bo, + .create_bo = wc_create_bo, + .release_bo = wc_release_bo, + }, + { + .name = "gpu", + .set_bo = gpu_set_bo, + .cmp_bo = gpu_cmp_bo, + .create_bo = gpu_create_bo, + .release_bo = nop_release_bo, + }, + { + .name = "gpuX", + .set_bo = gpu_set_bo, + .cmp_bo = gpu_cmp_bo, + .create_bo = gpuX_create_bo, + .release_bo = nop_release_bo, + }, }; #define MAX_NUM_BUFFERS 1024 @@ -335,7 +398,63 @@ static void blt_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) width, height, 32); } -static void do_overwrite_source(struct access_mode *mode, +static void cpu_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) +{ + const int size = width * height * sizeof(uint32_t); + void *d, *s; + + gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_CPU, 0); + gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); + s = gem_mmap__cpu(fd, src->handle, 0, size, PROT_READ); + igt_assert(s != NULL); + d = gem_mmap__cpu(fd, dst->handle, 0, size, PROT_WRITE); + igt_assert(d != NULL); + + memcpy(d, s, size); + + munmap(d, size); + munmap(s, size); +} + +static void gtt_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) +{ + const int size = width * height * sizeof(uint32_t); + void *d, *s; + + gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT, 0); + gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + + s = gem_mmap__gtt(fd, src->handle, size, PROT_READ); + igt_assert(s != NULL); + d = gem_mmap__gtt(fd, dst->handle, size, PROT_WRITE); + igt_assert(d != NULL); + + memcpy(d, s, size); + + munmap(d, size); + munmap(s, size); +} + +static void wc_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) +{ + const int size = width * height * sizeof(uint32_t); + void *d, *s; + + gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT, 0); + gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + + s = gem_mmap__wc(fd, src->handle, 0, size, PROT_READ); + igt_assert(s != NULL); + d = gem_mmap__wc(fd, dst->handle, 0, size, PROT_WRITE); + igt_assert(d != NULL); + + memcpy(d, s, size); + + munmap(d, size); + munmap(s, size); +} + +static void do_overwrite_source(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_copy do_copy_func) @@ -355,7 +474,7 @@ static void do_overwrite_source(struct access_mode *mode, mode->cmp_bo(dst[i], i, width, height, dummy); } -static void do_early_read(struct access_mode *mode, +static void do_early_read(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_copy do_copy_func) @@ -371,7 +490,7 @@ static void do_early_read(struct access_mode *mode, mode->cmp_bo(dst[i], 0xdeadbeef, width, height, dummy); } -static void do_gpu_read_after_write(struct access_mode *mode, +static void do_gpu_read_after_write(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_copy do_copy_func) @@ -389,18 +508,18 @@ static void do_gpu_read_after_write(struct access_mode *mode, mode->cmp_bo(dst[i], 0xabcdabcd, width, height, dummy); } -typedef void (*do_test)(struct access_mode *mode, +typedef void (*do_test)(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_copy do_copy_func); -typedef void (*run_wrap)(struct access_mode *mode, +typedef void (*run_wrap)(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_test do_test_func, do_copy do_copy_func); -static void run_single(struct access_mode *mode, +static void run_single(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_test do_test_func, @@ -409,7 +528,7 @@ static void run_single(struct access_mode *mode, do_test_func(mode, src, dst, dummy, do_copy_func); } -static void run_interruptible(struct access_mode *mode, +static void run_interruptible(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_test do_test_func, @@ -421,37 +540,44 @@ static void run_interruptible(struct access_mode *mode, do_test_func(mode, src, dst, dummy, do_copy_func); } -static void run_forked(struct access_mode *mode, +static void run_forked(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, do_test do_test_func, do_copy do_copy_func) { const int old_num_buffers = num_buffers; - drm_intel_bufmgr *bufmgr; num_buffers /= 16; num_buffers += 2; igt_fork(child, 16) { + drm_intel_bufmgr *bufmgr; + /* recreate process local variables */ bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_gem_enable_reuse(bufmgr); + batch = intel_batchbuffer_alloc(bufmgr, devid); + for (int i = 0; i < num_buffers; i++) { src[i] = mode->create_bo(bufmgr, width, height); dst[i] = mode->create_bo(bufmgr, width, height); } dummy = mode->create_bo(bufmgr, width, height); + for (int loop = 0; loop < 10; loop++) do_test_func(mode, src, dst, dummy, do_copy_func); + /* as we borrow the fd, we need to reap our bo */ for (int i = 0; i < num_buffers; i++) { - drm_intel_bo_unreference(src[i]); - drm_intel_bo_unreference(dst[i]); + mode->release_bo(src[i]); + mode->release_bo(dst[i]); } - drm_intel_bo_unreference(dummy); + mode->release_bo(dummy); + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); } @@ -460,6 +586,40 @@ static void run_forked(struct access_mode *mode, num_buffers = old_num_buffers; } +static void bit17_require(void) +{ + struct drm_i915_gem_get_tiling2 { + uint32_t handle; + uint32_t tiling_mode; + uint32_t swizzle_mode; + uint32_t phys_swizzle_mode; + } arg; +#define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2) + + memset(&arg, 0, sizeof(arg)); + arg.handle = gem_create(fd, 4096); + gem_set_tiling(fd, arg.handle, I915_TILING_X, 512); + + do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg)); + gem_close(fd, arg.handle); + igt_require(arg.phys_swizzle_mode == arg.swizzle_mode); +} + +static void cpu_require(void) +{ + bit17_require(); +} + +static void gtt_require(void) +{ +} + +static void wc_require(void) +{ + bit17_require(); + igt_require_mmap_wc(fd); +} + static void bcs_require(void) { } @@ -470,16 +630,19 @@ static void rcs_require(void) } static void -run_basic_modes(struct access_mode *mode, +run_basic_modes(const struct access_mode *mode, drm_intel_bo **src, drm_intel_bo **dst, drm_intel_bo *dummy, const char *suffix, run_wrap run_wrap_func) { - struct { + const struct { const char *prefix; do_copy copy; void (*require)(void); } pipelines[] = { + { "cpu", cpu_copy_bo, cpu_require }, + { "gtt", gtt_copy_bo, gtt_require }, + { "wc", wc_copy_bo, wc_require }, { "bcs", blt_copy_bo, bcs_require }, { "rcs", render_copy_bo, rcs_require }, { NULL, NULL } @@ -510,7 +673,7 @@ run_basic_modes(struct access_mode *mode, } static void -run_modes(struct access_mode *mode) +run_modes(const struct access_mode *mode) { drm_intel_bo *src[MAX_NUM_BUFFERS], *dst[MAX_NUM_BUFFERS], *dummy = NULL; drm_intel_bufmgr *bufmgr; @@ -535,10 +698,10 @@ run_modes(struct access_mode *mode) igt_fixture { for (int i = 0; i < num_buffers; i++) { - drm_intel_bo_unreference(src[i]); - drm_intel_bo_unreference(dst[i]); + mode->release_bo(src[i]); + mode->release_bo(dst[i]); } - drm_intel_bo_unreference(dummy); + mode->release_bo(dummy); intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); }