Message ID | 1421072071-10985-1-git-send-email-rodrigo.vivi@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Mon, Jan 12, 2015 at 06:14:31AM -0800, Rodrigo Vivi wrote: > This reverts commit 5a0afd4b78ec23f27f5d486ac3d102c2e8d66bd7. > > Although timeout mode allows higher residency it impact badly on performance. > I believe while we don't have a way to balance between performance and We do though. We already try to determine idle/low power/high power scenarios. -Chris
On Mon, 12 Jan 2015, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote: > This reverts commit 5a0afd4b78ec23f27f5d486ac3d102c2e8d66bd7. > > Although timeout mode allows higher residency it impact badly on performance. > I believe while we don't have a way to balance between performance and > power savings at runtime I believe we have to revert and prioritize > performance that was impacted a lot. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88103 The bug points at [1] as a potential fix. BR, Jani. [1] http://mid.gmane.org/1421668253-18641-4-git-send-email-ville.syrjala@linux.intel.com > > Cc: Deepak S <deepak.s@linux.intel.com> > Cc: Wendy Wang <wendy.wang@intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 20a6dfa..03fc7f2 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4681,8 +4681,7 @@ static void cherryview_enable_rps(struct drm_device *dev) > I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); > I915_WRITE(GEN6_RC_SLEEP, 0); > > - /* TO threshold set to 1750 us ( 0x557 * 1.28 us) */ > - I915_WRITE(GEN6_RC6_THRESHOLD, 0x557); > + I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */ > > /* allows RC6 residency counter to work */ > I915_WRITE(VLV_COUNTER_CONTROL, > @@ -4696,7 +4695,7 @@ static void cherryview_enable_rps(struct drm_device *dev) > /* 3: Enable RC6 */ > if ((intel_enable_rc6(dev) & INTEL_RC6_ENABLE) && > (pcbr >> VLV_PCBR_ADDR_SHIFT)) > - rc6_mode = GEN7_RC_CTL_TO_MODE; > + rc6_mode = GEN6_RC_CTL_EI_MODE(1); > > I915_WRITE(GEN6_RC_CONTROL, rc6_mode); > > -- > 1.9.3 >
On Wed, Jan 21, 2015 at 07:14:01PM +0200, Jani Nikula wrote: > On Mon, 12 Jan 2015, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote: > > This reverts commit 5a0afd4b78ec23f27f5d486ac3d102c2e8d66bd7. > > > > Although timeout mode allows higher residency it impact badly on performance. > > I believe while we don't have a way to balance between performance and > > power savings at runtime I believe we have to revert and prioritize > > performance that was impacted a lot. > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88103 > > The bug points at [1] as a potential fix. > > BR, > Jani. > > > [1] http://mid.gmane.org/1421668253-18641-4-git-send-email-ville.syrjala@linux.intel.com I've merged both Rodrigo's revert and Ville's fix + revert of the revert already. But didn't send out mails because no smtp at lca. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 20a6dfa..03fc7f2 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4681,8 +4681,7 @@ static void cherryview_enable_rps(struct drm_device *dev) I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); I915_WRITE(GEN6_RC_SLEEP, 0); - /* TO threshold set to 1750 us ( 0x557 * 1.28 us) */ - I915_WRITE(GEN6_RC6_THRESHOLD, 0x557); + I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */ /* allows RC6 residency counter to work */ I915_WRITE(VLV_COUNTER_CONTROL, @@ -4696,7 +4695,7 @@ static void cherryview_enable_rps(struct drm_device *dev) /* 3: Enable RC6 */ if ((intel_enable_rc6(dev) & INTEL_RC6_ENABLE) && (pcbr >> VLV_PCBR_ADDR_SHIFT)) - rc6_mode = GEN7_RC_CTL_TO_MODE; + rc6_mode = GEN6_RC_CTL_EI_MODE(1); I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
This reverts commit 5a0afd4b78ec23f27f5d486ac3d102c2e8d66bd7. Although timeout mode allows higher residency it impact badly on performance. I believe while we don't have a way to balance between performance and power savings at runtime I believe we have to revert and prioritize performance that was impacted a lot. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88103 Cc: Deepak S <deepak.s@linux.intel.com> Cc: Wendy Wang <wendy.wang@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)