From patchwork Wed Jan 28 08:49:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: meghanelogal X-Patchwork-Id: 5727641 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6B60BBF440 for ; Wed, 28 Jan 2015 08:52:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B84BE202B8 for ; Wed, 28 Jan 2015 08:52:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id EDE972010E for ; Wed, 28 Jan 2015 08:52:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9D5306E63A; Wed, 28 Jan 2015 00:52:42 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 207BB6E63A for ; Wed, 28 Jan 2015 00:52:42 -0800 (PST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 28 Jan 2015 00:52:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,480,1418112000"; d="scan'208";a="643728264" Received: from meghanelogal-2012-client-platform.iind.intel.com ([10.223.161.112]) by orsmga001.jf.intel.com with ESMTP; 28 Jan 2015 00:52:38 -0800 From: meghanelogal To: intel-gfx@lists.freedesktop.org Date: Wed, 28 Jan 2015 14:19:50 +0530 Message-Id: <1422434990-7662-1-git-send-email-megha.i.nelogal@intel.com> X-Mailer: git-send-email 1.7.9.5 Cc: manikandan.k.pillai@intel.com, meghanelogal , pratyush.dutta@intel.com Subject: [Intel-gfx] [PATCH] tools/intel_reg_read: Adding the reg offset for VLV and CHT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: meghanelogal For VLV and CHT for each register access we need to add base offset of 0x180000. Signed-off-by: meghanelogal --- tools/intel_reg_read.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/tools/intel_reg_read.c b/tools/intel_reg_read.c index 3b91291..c550b02 100644 --- a/tools/intel_reg_read.c +++ b/tools/intel_reg_read.c @@ -48,11 +48,13 @@ static void bit_decode(uint32_t reg) static void dump_range(uint32_t start, uint32_t end) { - int i; - + int i, reg = 0; + struct pci_device *dev = intel_get_pci_device(); + if (IS_CHERRYVIEW(dev->device_id) || IS_VALLEYVIEW(dev->device_id)) + reg = 0x180000; for (i = start; i < end; i += 4) printf("0x%X : 0x%X\n", i, - *(volatile uint32_t *)((volatile char*)mmio + i)); + *(volatile uint32_t *)((volatile char*)mmio + i + reg)); } static void usage(char *cmdname) @@ -129,11 +131,17 @@ int main(int argc, char** argv) sscanf(argv[i], "0x%x", ®); dump_range(reg, reg + (dwords * 4)); - if (decode_bits) - bit_decode(*(volatile uint32_t *)((volatile char*)mmio + reg)); + if (decode_bits) { + struct pci_device *dev = intel_get_pci_device(); + if (IS_CHERRYVIEW(dev->device_id) || + IS_VALLEYVIEW(dev->device_id)) { + reg += 0x180000; + bit_decode(*(volatile uint32_t *) + ((volatile char*)mmio + reg)); + } + } } } - intel_register_access_fini(); out: