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[4/4] drm/i915: Simplify pll state commit by swapping new and old state

Message ID 1422543311-5107-4-git-send-email-ander.conselvan.de.oliveira@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ander Conselvan de Oliveira Jan. 29, 2015, 2:55 p.m. UTC 
This deletes some code and is closer to what the logic will look like
with atomic mode setting.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 58 ++++++++----------------------------
 1 file changed, 12 insertions(+), 46 deletions(-)

Comments

Shuang He Jan. 31, 2015, 9:37 p.m. UTC | #1 
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5683
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  353/353              353/353
ILK                                  353/353              353/353
SNB                                  400/422              400/422
IVB              +1                 485/487              486/487
BYT                                  296/296              296/296
HSW              +1-11              404/405              394/405
BDW                 -1              401/402              400/402
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 IVB  igt_gem_storedw_batches_loop_normal      DMESG_WARN(5, M34M4)PASS(15, M34M4M21)      PASS(1, M21)
*HSW  igt_gem_pwrite_pread_display-copy-performance      PASS(5, M40M20)      DMESG_WARN(1, M40)
 HSW  igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance      DMESG_WARN(1, M40)PASS(18, M40M20)      PASS(1, M40)
*HSW  igt_kms_cursor_crc_cursor-size-change      PASS(2, M40)      TIMEOUT(1, M40)
*HSW  igt_kms_fence_pin_leak      PASS(2, M40)      TIMEOUT(1, M40)
*HSW  igt_kms_flip_bo-too-big      PASS(2, M40)      TIMEOUT(1, M40)
*HSW  igt_kms_flip_bo-too-big-interruptible      PASS(2, M40)      CRASH(1, M40)
*HSW  igt_kms_flip_dpms-vs-vblank-race      PASS(2, M40)      TIMEOUT(1, M40)
*HSW  igt_kms_flip_event_leak      PASS(2, M40)      TIMEOUT(1, M40)
*HSW  igt_kms_flip_flip-vs-dpms-off-vs-modeset      PASS(2, M40)      TIMEOUT(1, M40)
*HSW  igt_kms_flip_flip-vs-expired-vblank      PASS(2, M40)      TIMEOUT(1, M40)
*HSW  igt_kms_flip_flip-vs-expired-vblank-interruptible      PASS(2, M40)      CRASH(1, M40)
*HSW  igt_kms_flip_nonexisting-fb      PASS(3, M40M20)      TIMEOUT(1, M40)
*BDW  igt_kms_fence_pin_leak      PASS(2, M30)      TIMEOUT(1, M30)
Note: You need to pay more attention to line start with '*'
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fecffbb..96176c1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3963,46 +3963,11 @@  found:
 	return pll;
 }
 
-/**
- * intel_shared_dpll_start_config - start a new PLL staged config
- * @dev_priv: DRM device
- * @clear_pipes: mask of pipes that will have their PLLs freed
- *
- * Starts a new PLL staged config, copying the current config but
- * releasing the references of pipes specified in clear_pipes.
- */
-static int intel_shared_dpll_start_config(struct drm_i915_private *dev_priv,
-					  struct intel_atomic_state *state,
-					  unsigned clear_pipes)
-{
-	struct intel_shared_dpll_config *pll_config;
-	enum intel_dpll_id i;
-
-	/* FIXME: convert this to a simple memdup */
-
-	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-		pll_config = &dev_priv->display_state->shared_dpll[i];
-
-		memcpy(&state->shared_dpll[i], pll_config,
-		       sizeof *pll_config);
-		state->shared_dpll[i].crtc_mask &= ~clear_pipes;
-	}
-
-	return 0;
-}
-
-static void intel_shared_dpll_commit(struct drm_i915_private *dev_priv,
-				     struct intel_atomic_state *state)
+static struct intel_atomic_state *
+intel_atomic_state_duplicate(struct drm_i915_private *dev_priv)
 {
-	struct intel_shared_dpll_config *pll_config;
-	enum intel_dpll_id i;
-
-	/* FIXME: convert this to a poiner swap */
-
-	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-		pll_config = &dev_priv->display_state->shared_dpll[i];
-		*pll_config = state->shared_dpll[i];
-	}
+	return kmemdup(dev_priv->display_state,
+		       sizeof *dev_priv->display_state, GFP_KERNEL);
 }
 
 static void cpt_verify_modeset(struct drm_device *dev, int pipe)
@@ -10405,14 +10370,15 @@  static bool intel_crtc_in_use(struct drm_crtc *crtc)
 
 static void
 intel_modeset_update_state(struct drm_device *dev, unsigned prepare_pipes,
-			   struct intel_atomic_state *state)
+			   struct intel_atomic_state **state)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_encoder *intel_encoder;
 	struct intel_crtc *intel_crtc;
 	struct drm_connector *connector;
 
-	intel_shared_dpll_commit(dev_priv, state);
+	/* Commit PLL and other global state */
+	swap(dev_priv->display_state, *state);
 
 	for_each_intel_encoder(dev, intel_encoder) {
 		if (!intel_encoder->base.crtc)
@@ -11020,13 +10986,13 @@  static int __intel_set_mode_setup_plls(struct drm_device *dev,
 	unsigned clear_pipes = modeset_pipes | disable_pipes;
 	struct intel_crtc *intel_crtc;
 	int ret = 0;
+	int i;
 
 	if (!dev_priv->display.crtc_compute_clock)
 		return 0;
 
-	ret = intel_shared_dpll_start_config(dev_priv, state, clear_pipes);
-	if (ret)
-		return ret;
+	for (i = 0; i < dev_priv->num_shared_dpll; i++)
+		state->shared_dpll[i].crtc_mask &= ~clear_pipes;
 
 	for_each_intel_crtc_masked(dev, modeset_pipes, intel_crtc) {
 		struct intel_crtc_state *crtc_state = intel_crtc->new_config;
@@ -11077,7 +11043,7 @@  static int __intel_set_mode(struct drm_crtc *crtc,
 		prepare_pipes &= ~disable_pipes;
 	}
 
-	state = kzalloc(sizeof *state, GFP_KERNEL);
+	state = intel_atomic_state_duplicate(dev_priv);
 	if (!state) {
 		ret = -ENOMEM;
 		goto done;
@@ -11120,7 +11086,7 @@  static int __intel_set_mode(struct drm_crtc *crtc,
 
 	/* Only after disabling all output pipelines that will be changed can we
 	 * update the the output configuration. */
-	intel_modeset_update_state(dev, prepare_pipes, state);
+	intel_modeset_update_state(dev, prepare_pipes, &state);
 
 	modeset_update_crtc_power_domains(dev);