| Message ID | 1423133245-23953-5-git-send-email-nicholas.hoath@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Feb 05, 2015 at 10:47:19AM +0000, Nick Hoath wrote: > Move WaDisableDgMirrorFixInHalfSliceChicken5 to gen9_init_workarounds > > v1: Added stepping check > > v2: Removed unused register bitmap > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 8 -------- > drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++ > 2 files changed, 10 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index bebefe7..2b89aac 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -63,14 +63,6 @@ static void gen9_init_clock_gating(struct drm_device *dev) > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > > - /* > - * WaDisableDgMirrorFixInHalfSliceChicken5:skl > - * This is a pre-production w/a. > - */ > - I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, > - I915_READ(GEN9_HALF_SLICE_CHICKEN5) & > - ~GEN9_DG_MIRROR_FIX_ENABLE); > - > /* Wa4x4STCOptimizationDisable:skl */ > I915_WRITE(CACHE_MODE_1, > _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index b869f1c..fa15cb6 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -882,6 +882,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, > PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); > > + if (INTEL_REVID(dev) == SKL_A0_REVID) { for SKL, I read B0 only. > + /* > + * WaDisableDgMirrorFixInHalfSliceChicken5:skl > + * This is a pre-production w/a. > + */ > + I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, > + I915_READ(GEN9_HALF_SLICE_CHICKEN5) & > + ~GEN9_DG_MIRROR_FIX_ENABLE); > + } > + > return 0; > } > > -- > 2.1.1 >
On Thu, Feb 05, 2015 at 05:55:06PM +0000, Damien Lespiau wrote: > > + if (INTEL_REVID(dev) == SKL_A0_REVID) { > > for SKL, I read B0 only. Well B0 only in the W/A db, but A0 and B0 in BSpec. I'd trust BSpec on those.
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index bebefe7..2b89aac 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -63,14 +63,6 @@ static void gen9_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); - /* - * WaDisableDgMirrorFixInHalfSliceChicken5:skl - * This is a pre-production w/a. - */ - I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, - I915_READ(GEN9_HALF_SLICE_CHICKEN5) & - ~GEN9_DG_MIRROR_FIX_ENABLE); - /* Wa4x4STCOptimizationDisable:skl */ I915_WRITE(CACHE_MODE_1, _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index b869f1c..fa15cb6 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -882,6 +882,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); + if (INTEL_REVID(dev) == SKL_A0_REVID) { + /* + * WaDisableDgMirrorFixInHalfSliceChicken5:skl + * This is a pre-production w/a. + */ + I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, + I915_READ(GEN9_HALF_SLICE_CHICKEN5) & + ~GEN9_DG_MIRROR_FIX_ENABLE); + } + return 0; }
Move WaDisableDgMirrorFixInHalfSliceChicken5 to gen9_init_workarounds v1: Added stepping check v2: Removed unused register bitmap Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 8 -------- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 8 deletions(-)