diff mbox

[07/10] drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7)

Message ID 1423133245-23953-8-git-send-email-nicholas.hoath@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Nick Hoath Feb. 5, 2015, 10:47 a.m. UTC
Move WaEnableYV12BugFixInHalfSliceChicken7 to gen9_init_workarounds

v1: Add stepping check.

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h         | 3 +++
 drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++
 2 files changed, 9 insertions(+)

Comments

Lespiau, Damien Feb. 5, 2015, 6:04 p.m. UTC | #1
On Thu, Feb 05, 2015 at 10:47:22AM +0000, Nick Hoath wrote:
> Move WaEnableYV12BugFixInHalfSliceChicken7 to gen9_init_workarounds
> 
> v1: Add stepping check.
> 
> Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h         | 3 +++
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index dab4c1e..4ee1964 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6216,6 +6216,9 @@ enum skl_disp_power_wells {
>  #define   GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC	(1<<5)
>  #define   GEN8_SAMPLER_POWER_BYPASS_DIS	(1<<1)
>  
> +#define GEN9_HALF_SLICE_CHICKEN7	0xe194
> +#define   GEN9_ENABLE_YV12_BUGFIX	(1<<4)
> +
>  /* Audio */
>  #define G4X_AUD_VID_DID			(dev_priv->info.display_mmio_offset + 0x62020)
>  #define   INTEL_AUDIO_DEVCL		0x808629FB
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index baeec8f..884f319 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -896,6 +896,12 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
>  			~GEN9_DG_MIRROR_FIX_ENABLE);
>  	}
>  
> +	if (INTEL_REVID(dev) >= SKL_C0_REVID) {
> +		/* WaEnableYV12BugFixInHalfSliceChicken7:skl */
> +		WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
> +				  GEN9_ENABLE_YV12_BUGFIX);
> +	}
> +
>  	return 0;
>  }
>  
> -- 
> 2.1.1
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index dab4c1e..4ee1964 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6216,6 +6216,9 @@  enum skl_disp_power_wells {
 #define   GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC	(1<<5)
 #define   GEN8_SAMPLER_POWER_BYPASS_DIS	(1<<1)
 
+#define GEN9_HALF_SLICE_CHICKEN7	0xe194
+#define   GEN9_ENABLE_YV12_BUGFIX	(1<<4)
+
 /* Audio */
 #define G4X_AUD_VID_DID			(dev_priv->info.display_mmio_offset + 0x62020)
 #define   INTEL_AUDIO_DEVCL		0x808629FB
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index baeec8f..884f319 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -896,6 +896,12 @@  static int gen9_init_workarounds(struct intel_engine_cs *ring)
 			~GEN9_DG_MIRROR_FIX_ENABLE);
 	}
 
+	if (INTEL_REVID(dev) >= SKL_C0_REVID) {
+		/* WaEnableYV12BugFixInHalfSliceChicken7:skl */
+		WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
+				  GEN9_ENABLE_YV12_BUGFIX);
+	}
+
 	return 0;
 }