diff mbox

[1/7] drm/i915/skl: Added new macros

Message ID 1423234598-14781-2-git-send-email-akash.goel@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

akash.goel@intel.com Feb. 6, 2015, 2:56 p.m. UTC 
From: Akash Goel <akash.goel@intel.com>

For SKL, register definition for RPNSWREQ (A008), RPSTAT1(A01C)
have changed slightly. Also on SKL, frequency is specified in
units of 16.66 MHZ, compared to 50 MHZ for most of the earlier
platforms and the time values are expressed in units of 1.33 us,
compared to 1.28 us for earlier platforms.
Added new macros for the aforementioned changes.

Signed-off-by: Akash Goel <akash.goel@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 1 +
 drivers/gpu/drm/i915/i915_reg.h | 9 +++++++++
 2 files changed, 10 insertions(+)

Comments

Lespiau, Damien Feb. 16, 2015, 7:05 p.m. UTC | #1 
On Fri, Feb 06, 2015 at 08:26:32PM +0530, akash.goel@intel.com wrote:
> From: Akash Goel <akash.goel@intel.com>
> 
> For SKL, register definition for RPNSWREQ (A008), RPSTAT1(A01C)
> have changed slightly. Also on SKL, frequency is specified in
> units of 16.66 MHZ, compared to 50 MHZ for most of the earlier
> platforms and the time values are expressed in units of 1.33 us,
> compared to 1.28 us for earlier platforms.
> Added new macros for the aforementioned changes.
> 
> Signed-off-by: Akash Goel <akash.goel@intel.com>

We try to put the relevant defines in the patch using them (for next
time :). Everything looks correct though:

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Lespiau, Damien Feb. 17, 2015, 2:40 p.m. UTC | #2 
On Fri, Feb 06, 2015 at 08:26:32PM +0530, akash.goel@intel.com wrote:
> +#define FREQ_1_28_US(us)	(((us) * 100) >> 7)
> +#define FREQ_1_33_US(us)	(((us) * 3)   >> 2)
> +#define GT_FREQ_FROM_PERIOD(us, dev) (IS_GEN9(dev) ? \
> +				FREQ_1_33_US(us) : \
> +				FREQ_1_28_US(us))

I'm not sure why you call that GT_FREQ when it looks like a time for
evaluation intervals.
akash.goel@intel.com Feb. 17, 2015, 3:20 p.m. UTC | #3 
Thanks for the review. Agree it's not an appropriate name. 
Please kindly suggest one.  
'GT_TIME_COUNTER_UNITS_FROM_PERIOD' ??

Best regards
Akash

-----Original Message-----
From: Lespiau, Damien 
Sent: Tuesday, February 17, 2015 8:10 PM
To: Goel, Akash
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/7] drm/i915/skl: Added new macros

On Fri, Feb 06, 2015 at 08:26:32PM +0530, akash.goel@intel.com wrote:
> +#define FREQ_1_28_US(us)	(((us) * 100) >> 7)
> +#define FREQ_1_33_US(us)	(((us) * 3)   >> 2)
> +#define GT_FREQ_FROM_PERIOD(us, dev) (IS_GEN9(dev) ? \
> +				FREQ_1_33_US(us) : \
> +				FREQ_1_28_US(us))

I'm not sure why you call that GT_FREQ when it looks like a time for evaluation intervals.

--
Damien
Lespiau, Damien Feb. 17, 2015, 3:26 p.m. UTC | #4 
How about GT_INTERVAL_FROM_US()? GT_EVALUATION_COUNTER_FROM_US()?
something along these lines I guess.
akash.goel@intel.com Feb. 17, 2015, 3:32 p.m. UTC | #5 
Will prefer GT_INTERVAL_FROM_US, as GT_EVALUATION_COUNTER_FROM_US would be more specific.

Best regards
Akash

-----Original Message-----
From: Lespiau, Damien 
Sent: Tuesday, February 17, 2015 8:56 PM
To: Goel, Akash
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/7] drm/i915/skl: Added new macros

How about GT_INTERVAL_FROM_US()? GT_EVALUATION_COUNTER_FROM_US()?
something along these lines I guess.
Daniel Vetter Feb. 23, 2015, 4:21 p.m. UTC | #6 
On Tue, Feb 17, 2015 at 03:32:35PM +0000, Goel, Akash wrote:
> Will prefer GT_INTERVAL_FROM_US, as GT_EVALUATION_COUNTER_FROM_US would be more specific.

Is there a new patch with revised #defines? I haven't yet caught up with
mail ...
-Daniel

> 
> Best regards
> Akash
> 
> -----Original Message-----
> From: Lespiau, Damien 
> Sent: Tuesday, February 17, 2015 8:56 PM
> To: Goel, Akash
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/7] drm/i915/skl: Added new macros
> 
> How about GT_INTERVAL_FROM_US()? GT_EVALUATION_COUNTER_FROM_US()?
> something along these lines I guess.
> 
> -- 
> Damien
> 
> On Tue, Feb 17, 2015 at 03:20:53PM +0000, Goel, Akash wrote:
> > Thanks for the review. Agree it's not an appropriate name. 
> > Please kindly suggest one.  
> > 'GT_TIME_COUNTER_UNITS_FROM_PERIOD' ??
> > 
> > Best regards
> > Akash
> > 
> > -----Original Message-----
> > From: Lespiau, Damien 
> > Sent: Tuesday, February 17, 2015 8:10 PM
> > To: Goel, Akash
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH 1/7] drm/i915/skl: Added new macros
> > 
> > On Fri, Feb 06, 2015 at 08:26:32PM +0530, akash.goel@intel.com wrote:
> > > +#define FREQ_1_28_US(us)	(((us) * 100) >> 7)
> > > +#define FREQ_1_33_US(us)	(((us) * 3)   >> 2)
> > > +#define GT_FREQ_FROM_PERIOD(us, dev) (IS_GEN9(dev) ? \
> > > +				FREQ_1_33_US(us) : \
> > > +				FREQ_1_28_US(us))
> > 
> > I'm not sure why you call that GT_FREQ when it looks like a time for evaluation intervals.
> > 
> > --
> > Damien
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Lespiau, Damien Feb. 23, 2015, 4:22 p.m. UTC | #7 
On Mon, Feb 23, 2015 at 05:21:35PM +0100, Daniel Vetter wrote:
> On Tue, Feb 17, 2015 at 03:32:35PM +0000, Goel, Akash wrote:
> > Will prefer GT_INTERVAL_FROM_US, as GT_EVALUATION_COUNTER_FROM_US would be more specific.
> 
> Is there a new patch with revised #defines? I haven't yet caught up with
> mail ...

Yes, but it's awfully entangled, each new series being sent as a reply
of another series. Sending a separate thread for a new version is so
much easier for the reader when several patches change.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ca64b99..529b9b2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2485,6 +2485,7 @@  struct drm_i915_cmd_table {
 #define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_DPF(dev))
 
 #define GT_FREQUENCY_MULTIPLIER 50
+#define GEN9_FREQ_SCALER 3
 
 #include "i915_trace.h"
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cd3430f9..c4a4c58 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2389,6 +2389,12 @@  enum skl_disp_power_wells {
 #define GEN6_RP_STATE_LIMITS	(MCHBAR_MIRROR_BASE_SNB + 0x5994)
 #define GEN6_RP_STATE_CAP	(MCHBAR_MIRROR_BASE_SNB + 0x5998)
 
+#define FREQ_1_28_US(us)	(((us) * 100) >> 7)
+#define FREQ_1_33_US(us)	(((us) * 3)   >> 2)
+#define GT_FREQ_FROM_PERIOD(us, dev) (IS_GEN9(dev) ? \
+				FREQ_1_33_US(us) : \
+				FREQ_1_28_US(us))
+
 /*
  * Logical Context regs
  */
@@ -6023,6 +6029,7 @@  enum skl_disp_power_wells {
 #define   GEN6_TURBO_DISABLE			(1<<31)
 #define   GEN6_FREQUENCY(x)			((x)<<25)
 #define   HSW_FREQUENCY(x)			((x)<<24)
+#define   GEN9_FREQUENCY(x)			((x)<<23)
 #define   GEN6_OFFSET(x)			((x)<<19)
 #define   GEN6_AGGRESSIVE_TURBO			(0<<15)
 #define GEN6_RC_VIDEO_FREQ			0xA00C
@@ -6041,8 +6048,10 @@  enum skl_disp_power_wells {
 #define GEN6_RPSTAT1				0xA01C
 #define   GEN6_CAGF_SHIFT			8
 #define   HSW_CAGF_SHIFT			7
+#define   GEN9_CAGF_SHIFT			23
 #define   GEN6_CAGF_MASK			(0x7f << GEN6_CAGF_SHIFT)
 #define   HSW_CAGF_MASK				(0x7f << HSW_CAGF_SHIFT)
+#define   GEN9_CAGF_MASK			(0x1ff << GEN9_CAGF_SHIFT)
 #define GEN6_RP_CONTROL				0xA024
 #define   GEN6_RP_MEDIA_TURBO			(1<<11)
 #define   GEN6_RP_MEDIA_MODE_MASK		(3<<9)