diff mbox

[02/12] drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines

Message ID 1423574909-1074-3-git-send-email-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä Feb. 10, 2015, 1:28 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Kill the silly DRAIN_LATENCY_PRECISION_* defines and just use the raw
number instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h |  4 ----
 drivers/gpu/drm/i915/intel_pm.c | 12 ++++--------
 2 files changed, 4 insertions(+), 12 deletions(-)

Comments

Jesse Barnes Feb. 27, 2015, 5:38 p.m. UTC | #1 
On 02/10/2015 05:28 AM, ville.syrjala@linux.intel.com wrote:
> @@ -957,8 +954,7 @@ static void valleyview_update_sprite_wm(struct
drm_plane *plane,
>  	int plane_prec;
>  	int sprite_dl;
>  	int prec_mult;
> -	const int high_precision = IS_CHERRYVIEW(dev) ?
> -		DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_64;
> +	const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
>  
>  	sprite_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_SPRITE_PRECISION_HIGH(sprite) |
>  		    (DRAIN_LATENCY_MASK << DDL_SPRITE_SHIFT(sprite)));
> 

This hunk changes things; did it belong in the earlier patch?

With that explained:
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Ville Syrjälä Feb. 27, 2015, 6:06 p.m. UTC | #2 
On Fri, Feb 27, 2015 at 09:38:10AM -0800, Jesse Barnes wrote:
> On 02/10/2015 05:28 AM, ville.syrjala@linux.intel.com wrote:
> > @@ -957,8 +954,7 @@ static void valleyview_update_sprite_wm(struct
> drm_plane *plane,
> >  	int plane_prec;
> >  	int sprite_dl;
> >  	int prec_mult;
> > -	const int high_precision = IS_CHERRYVIEW(dev) ?
> > -		DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_64;
> > +	const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
> >  
> >  	sprite_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_SPRITE_PRECISION_HIGH(sprite) |
> >  		    (DRAIN_LATENCY_MASK << DDL_SPRITE_SHIFT(sprite)));
> > 
> 
> This hunk changes things; did it belong in the earlier patch?

Yeah that should have been part of patch 1 already. I'll respin.

> 
> With that explained:
> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d8a0205..230320b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4166,10 +4166,6 @@  enum skl_disp_power_wells {
 #define   DSPFW_PLANEA_WM1_HI_MASK	(1<<0)
 
 /* drain latency register values*/
-#define DRAIN_LATENCY_PRECISION_8	8
-#define DRAIN_LATENCY_PRECISION_16	16
-#define DRAIN_LATENCY_PRECISION_32	32
-#define DRAIN_LATENCY_PRECISION_64	64
 #define VLV_DDL(pipe)			(VLV_DISPLAY_BASE + 0x70050 + 4 * (pipe))
 #define DDL_CURSOR_PRECISION_HIGH	(1<<31)
 #define DDL_CURSOR_PRECISION_LOW	(0<<31)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a70bce4..0f0281a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -728,11 +728,9 @@  static bool vlv_compute_drain_latency(struct drm_crtc *crtc,
 
 	entries = DIV_ROUND_UP(clock, 1000) * pixel_size;
 	if (IS_CHERRYVIEW(dev))
-		*prec_mult = (entries > 32) ? DRAIN_LATENCY_PRECISION_16 :
-					      DRAIN_LATENCY_PRECISION_8;
+		*prec_mult = (entries > 32) ? 16 : 8;
 	else
-		*prec_mult = (entries > 128) ? DRAIN_LATENCY_PRECISION_64 :
-					       DRAIN_LATENCY_PRECISION_32;
+		*prec_mult = (entries > 128) ? 64 : 32;
 	*drain_latency = (64 * (*prec_mult) * 4) / entries;
 
 	if (*drain_latency > DRAIN_LATENCY_MASK)
@@ -758,8 +756,7 @@  static void vlv_update_drain_latency(struct drm_crtc *crtc)
 	int drain_latency;
 	enum pipe pipe = intel_crtc->pipe;
 	int plane_prec, prec_mult, plane_dl;
-	const int high_precision = IS_CHERRYVIEW(dev) ?
-		DRAIN_LATENCY_PRECISION_16 : DRAIN_LATENCY_PRECISION_64;
+	const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
 
 	plane_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_PLANE_PRECISION_HIGH |
 		   DRAIN_LATENCY_MASK | DDL_CURSOR_PRECISION_HIGH |
@@ -957,8 +954,7 @@  static void valleyview_update_sprite_wm(struct drm_plane *plane,
 	int plane_prec;
 	int sprite_dl;
 	int prec_mult;
-	const int high_precision = IS_CHERRYVIEW(dev) ?
-		DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_64;
+	const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
 
 	sprite_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_SPRITE_PRECISION_HIGH(sprite) |
 		    (DRAIN_LATENCY_MASK << DDL_SPRITE_SHIFT(sprite)));