Message ID | 1424366285-29232-34-git-send-email-John.C.Harrison@Intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 19/02/2015 17:17, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > Updated *_ring_invalidate_all_caches(), i915_reset_gen7_sol_offsets() and > i915_emit_box() to take request structures instead of ring or ringbuf/context > pairs. > > For: VIZ-5115 > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > --- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 12 +++++++----- > drivers/gpu/drm/i915/intel_lrc.c | 9 ++++----- > drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ++- > drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +- > 4 files changed, 14 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > index dc13751..a79c893 100644 > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > @@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req, > /* Unconditionally invalidate gpu caches and ensure that we do flush > * any residual writes from the previous batch. > */ > - return intel_ring_invalidate_all_caches(req->ring); > + return intel_ring_invalidate_all_caches(req); > } > > static bool > @@ -1002,8 +1002,9 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params) > > static int > i915_reset_gen7_sol_offsets(struct drm_device *dev, > - struct intel_engine_cs *ring) > + struct drm_i915_gem_request *req) > { > + struct intel_engine_cs *ring = req->ring; > struct drm_i915_private *dev_priv = dev->dev_private; > int ret, i; > > @@ -1028,10 +1029,11 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, > } > > static int > -i915_emit_box(struct intel_engine_cs *ring, > +i915_emit_box(struct drm_i915_gem_request *req, > struct drm_clip_rect *box, > int DR1, int DR4) > { > + struct intel_engine_cs *ring = req->ring; > int ret; > > if (box->y2 <= box->y1 || box->x2 <= box->x1 || > @@ -1247,7 +1249,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, > } > > if (args->flags & I915_EXEC_GEN7_SOL_RESET) { > - ret = i915_reset_gen7_sol_offsets(params->dev, ring); > + ret = i915_reset_gen7_sol_offsets(params->dev, params->request); > if (ret) > goto error; > } > @@ -1258,7 +1260,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, > > if (cliprects) { > for (i = 0; i < args->num_cliprects; i++) { > - ret = i915_emit_box(ring, &cliprects[i], > + ret = i915_emit_box(params->request, &cliprects[i], > args->DR1, args->DR4); > if (ret) > goto error; > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > index 479365e..fab9269 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -558,10 +558,9 @@ static int execlists_context_queue(struct intel_engine_cs *ring, > return 0; > } > > -static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf, > - struct intel_context *ctx) > +static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req) > { > - struct intel_engine_cs *ring = ringbuf->ring; > + struct intel_engine_cs *ring = req->ring; > uint32_t flush_domains; > int ret; > > @@ -569,7 +568,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf, > if (ring->gpu_caches_dirty) > flush_domains = I915_GEM_GPU_DOMAINS; > > - ret = ring->emit_flush(ringbuf, ctx, > + ret = ring->emit_flush(req->ringbuf, req->ctx, > I915_GEM_GPU_DOMAINS, flush_domains); > if (ret) > return ret; > @@ -605,7 +604,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req, > /* Unconditionally invalidate gpu caches and ensure that we do flush > * any residual writes from the previous batch. > */ > - return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx); > + return logical_ring_invalidate_all_caches(req); > } > > /** > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 508d7d8..efa44db 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -2864,8 +2864,9 @@ intel_ring_flush_all_caches(struct intel_engine_cs *ring) > } > > int > -intel_ring_invalidate_all_caches(struct intel_engine_cs *ring) > +intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req) > { > + struct intel_engine_cs *ring = req->ring; > uint32_t flush_domains; > int ret; > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h > index 25d5ede..b817725 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h > @@ -414,7 +414,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring); > int __must_check intel_ring_idle(struct intel_engine_cs *ring); > void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno); > int intel_ring_flush_all_caches(struct intel_engine_cs *ring); > -int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring); > +int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req); > > void intel_fini_pipe_control(struct intel_engine_cs *ring); > int intel_init_pipe_control(struct intel_engine_cs *ring); > Nitpick: "Update a bunch of execbuffer >>> heplers <<< " Reviewed-by: Tomas Elf <tomas.elf@intel.com> Thanks, Tomas
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index dc13751..a79c893 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -857,7 +857,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req, /* Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. */ - return intel_ring_invalidate_all_caches(req->ring); + return intel_ring_invalidate_all_caches(req); } static bool @@ -1002,8 +1002,9 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params) static int i915_reset_gen7_sol_offsets(struct drm_device *dev, - struct intel_engine_cs *ring) + struct drm_i915_gem_request *req) { + struct intel_engine_cs *ring = req->ring; struct drm_i915_private *dev_priv = dev->dev_private; int ret, i; @@ -1028,10 +1029,11 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, } static int -i915_emit_box(struct intel_engine_cs *ring, +i915_emit_box(struct drm_i915_gem_request *req, struct drm_clip_rect *box, int DR1, int DR4) { + struct intel_engine_cs *ring = req->ring; int ret; if (box->y2 <= box->y1 || box->x2 <= box->x1 || @@ -1247,7 +1249,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, } if (args->flags & I915_EXEC_GEN7_SOL_RESET) { - ret = i915_reset_gen7_sol_offsets(params->dev, ring); + ret = i915_reset_gen7_sol_offsets(params->dev, params->request); if (ret) goto error; } @@ -1258,7 +1260,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, if (cliprects) { for (i = 0; i < args->num_cliprects; i++) { - ret = i915_emit_box(ring, &cliprects[i], + ret = i915_emit_box(params->request, &cliprects[i], args->DR1, args->DR4); if (ret) goto error; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 479365e..fab9269 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -558,10 +558,9 @@ static int execlists_context_queue(struct intel_engine_cs *ring, return 0; } -static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf, - struct intel_context *ctx) +static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req) { - struct intel_engine_cs *ring = ringbuf->ring; + struct intel_engine_cs *ring = req->ring; uint32_t flush_domains; int ret; @@ -569,7 +568,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf, if (ring->gpu_caches_dirty) flush_domains = I915_GEM_GPU_DOMAINS; - ret = ring->emit_flush(ringbuf, ctx, + ret = ring->emit_flush(req->ringbuf, req->ctx, I915_GEM_GPU_DOMAINS, flush_domains); if (ret) return ret; @@ -605,7 +604,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req, /* Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. */ - return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx); + return logical_ring_invalidate_all_caches(req); } /** diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 508d7d8..efa44db 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -2864,8 +2864,9 @@ intel_ring_flush_all_caches(struct intel_engine_cs *ring) } int -intel_ring_invalidate_all_caches(struct intel_engine_cs *ring) +intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req) { + struct intel_engine_cs *ring = req->ring; uint32_t flush_domains; int ret; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 25d5ede..b817725 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -414,7 +414,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring); int __must_check intel_ring_idle(struct intel_engine_cs *ring); void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno); int intel_ring_flush_all_caches(struct intel_engine_cs *ring); -int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring); +int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req); void intel_fini_pipe_control(struct intel_engine_cs *ring); int intel_init_pipe_control(struct intel_engine_cs *ring);