Message ID | 1424366285-29232-49-git-send-email-John.C.Harrison@Intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 19/02/2015 17:18, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > Now that everything above has been converted to use requests, intel_ring_begin() > can be updated to take a request instead of a ring. This also means that it no > longer needs to lazily allocate a request if no-one happens to have done it > earlier. > > For: VIZ-5115 > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > --- > drivers/gpu/drm/i915/i915_gem.c | 2 +- > drivers/gpu/drm/i915/i915_gem_context.c | 2 +- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 ++-- > drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +-- > drivers/gpu/drm/i915/intel_display.c | 10 ++-- > drivers/gpu/drm/i915/intel_overlay.c | 8 ++-- > drivers/gpu/drm/i915/intel_pm.c | 2 +- > drivers/gpu/drm/i915/intel_ringbuffer.c | 72 +++++++++++++--------------- > drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +- > 9 files changed, 54 insertions(+), 58 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index b5613ff..60f6671 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -4656,7 +4656,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice) > if (!HAS_L3_DPF(dev) || !remap_info) > return 0; > > - ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3); > + ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3); > if (ret) > return ret; > > diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c > index 384f481..e348424 100644 > --- a/drivers/gpu/drm/i915/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/i915_gem_context.c > @@ -503,7 +503,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags) > if (INTEL_INFO(ring->dev)->gen >= 7) > len += 2 + (num_rings ? 4*num_rings + 2 : 0); > > - ret = intel_ring_begin(ring, len); > + ret = intel_ring_begin(req, len); > if (ret) > return ret; > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > index 8b4f8a9..6a703e6 100644 > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > @@ -1013,7 +1013,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, > return -EINVAL; > } > > - ret = intel_ring_begin(ring, 4 * 3); > + ret = intel_ring_begin(req, 4 * 3); > if (ret) > return ret; > > @@ -1044,7 +1044,7 @@ i915_emit_box(struct drm_i915_gem_request *req, > } > > if (INTEL_INFO(ring->dev)->gen >= 4) { > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -1053,7 +1053,7 @@ i915_emit_box(struct drm_i915_gem_request *req, > intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16); > intel_ring_emit(ring, DR4); > } else { > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -1235,7 +1235,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, > > if (ring == &dev_priv->ring[RCS] && > instp_mode != dev_priv->relative_constants_mode) { > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(params->request, 4); > if (ret) > goto error; > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index a1af644..0445278 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -288,7 +288,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry, > > BUG_ON(entry >= 4); > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -788,7 +788,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt, > if (ret) > return ret; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -825,7 +825,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt, > if (ret) > return ret; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 7962946..6901e9a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -9259,7 +9259,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev, > u32 flip_mask; > int ret; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -9294,7 +9294,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev, > u32 flip_mask; > int ret; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -9327,7 +9327,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev, > uint32_t pf, pipesrc; > int ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -9366,7 +9366,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev, > uint32_t pf, pipesrc; > int ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -9442,7 +9442,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, > if (ret) > return ret; > > - ret = intel_ring_begin(ring, len); > + ret = intel_ring_begin(req, len); > if (ret) > return ret; > > diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c > index 228c9d1..1fb7653 100644 > --- a/drivers/gpu/drm/i915/intel_overlay.c > +++ b/drivers/gpu/drm/i915/intel_overlay.c > @@ -251,7 +251,7 @@ static int intel_overlay_on(struct intel_overlay *overlay) > if (ret) > return ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) { > i915_gem_request_unreference(req); > return ret; > @@ -292,7 +292,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay, > if (ret) > return ret; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) { > i915_gem_request_unreference(req); > return ret; > @@ -359,7 +359,7 @@ static int intel_overlay_off(struct intel_overlay *overlay) > if (ret) > return ret; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) { > i915_gem_request_unreference(req); > return ret; > @@ -434,7 +434,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay) > if (ret) > return ret; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) { > i915_gem_request_unreference(req); > return ret; > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 6594a52..cc22536 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5012,7 +5012,7 @@ static void ironlake_enable_rc6(struct drm_device *dev) > * GPU can automatically power down the render unit if given a page > * to save state. > */ > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > goto err; > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 109f283..5eef02e 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req, > if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER) > cmd |= MI_READ_FLUSH; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) > return ret; > > @@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req, > (IS_G4X(dev) || IS_GEN5(dev))) > cmd |= MI_INVALIDATE_ISP; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) > return ret; > > @@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req) > u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; > int ret; > > - > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req) > intel_ring_emit(ring, MI_NOOP); > intel_ring_advance(ring); > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req, > flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL; > } > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req) > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -330,7 +329,7 @@ static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value) > if (!ring->fbc_dirty) > return 0; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > /* WaFbcNukeOn3DBlt:ivb/hsw */ > @@ -395,7 +394,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req, > gen7_render_ring_cs_stall_wa(req); > } > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -418,7 +417,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req, > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -760,7 +759,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req) > if (ret) > return ret; > > - ret = intel_ring_begin(ring, (w->count * 2 + 2)); > + ret = intel_ring_begin(req, (w->count * 2 + 2)); > if (ret) > return ret; > > @@ -1119,7 +1118,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req, > num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS; > #undef MBOX_UPDATE_DWORDS > > - ret = intel_ring_begin(signaller, num_dwords); > + ret = intel_ring_begin(signaller_req, num_dwords); > if (ret) > return ret; > > @@ -1160,7 +1159,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req, > num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS; > #undef MBOX_UPDATE_DWORDS > > - ret = intel_ring_begin(signaller, num_dwords); > + ret = intel_ring_begin(signaller_req, num_dwords); > if (ret) > return ret; > > @@ -1199,7 +1198,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req, > num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2); > #undef MBOX_UPDATE_DWORDS > > - ret = intel_ring_begin(signaller, num_dwords); > + ret = intel_ring_begin(signaller_req, num_dwords); > if (ret) > return ret; > > @@ -1237,7 +1236,7 @@ gen6_add_request(struct drm_i915_gem_request *req) > if (ring->semaphore.signal) > ret = ring->semaphore.signal(req, 4); > else > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > > if (ret) > return ret; > @@ -1275,7 +1274,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req, > struct drm_i915_private *dev_priv = waiter->dev->dev_private; > int ret; > > - ret = intel_ring_begin(waiter, 4); > + ret = intel_ring_begin(waiter_req, 4); > if (ret) > return ret; > > @@ -1312,7 +1311,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req, > > WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID); > > - ret = intel_ring_begin(waiter, 4); > + ret = intel_ring_begin(waiter_req, 4); > if (ret) > return ret; > > @@ -1357,7 +1356,7 @@ pc_render_add_request(struct drm_i915_gem_request *req) > * incoherence by flushing the 6 PIPE_NOTIFY buffers out to > * memory before requesting an interrupt. > */ > - ret = intel_ring_begin(ring, 32); > + ret = intel_ring_begin(req, 32); > if (ret) > return ret; > > @@ -1542,7 +1541,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req, > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) > return ret; > > @@ -1558,7 +1557,7 @@ i9xx_add_request(struct drm_i915_gem_request *req) > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -1703,7 +1702,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req, > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) > return ret; > > @@ -1731,7 +1730,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req, > u32 cs_offset = ring->scratch.gtt_offset; > int ret; > > - ret = intel_ring_begin(ring, 6); > + ret = intel_ring_begin(req, 6); > if (ret) > return ret; > > @@ -1748,7 +1747,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req, > if (len > I830_BATCH_LIMIT) > return -ENOSPC; > > - ret = intel_ring_begin(ring, 6 + 2); > + ret = intel_ring_begin(req, 6 + 2); > if (ret) > return ret; > > @@ -1771,7 +1770,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req, > offset = cs_offset; > } > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -1793,7 +1792,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req, > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) > return ret; > > @@ -2232,13 +2231,15 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring, > return 0; > } > > -int intel_ring_begin(struct intel_engine_cs *ring, > +int intel_ring_begin(struct drm_i915_gem_request *req, > int num_dwords) > { > - struct drm_i915_gem_request *req; > + struct intel_engine_cs *ring = req->ring; The WARN_ON below will only fire _after_ we've already gotten a null pointer exception here at the req->ring dereference. You might want to rearrange this a bit so that the WARN_ON appears before the dereference. Thanks, Tomas > struct drm_i915_private *dev_priv = ring->dev->dev_private; > int ret; > > + WARN_ON(req == NULL); > + > ret = i915_gem_check_wedge(&dev_priv->gpu_error, > dev_priv->mm.interruptible); > if (ret) > @@ -2248,11 +2249,6 @@ int intel_ring_begin(struct intel_engine_cs *ring, > if (ret) > return ret; > > - /* Preallocate the olr before touching the ring */ > - ret = intel_ring_alloc_request(ring, NULL, &req); > - if (ret) > - return ret; > - > ring->buffer->space -= num_dwords * sizeof(uint32_t); > return 0; > } > @@ -2268,7 +2264,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req) > return 0; > > num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords; > - ret = intel_ring_begin(ring, num_dwords); > + ret = intel_ring_begin(req, num_dwords); > if (ret) > return ret; > > @@ -2338,7 +2334,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req, > uint32_t cmd; > int ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -2385,7 +2381,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req, > !(dispatch_flags & I915_DISPATCH_SECURE); > int ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > @@ -2407,7 +2403,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req, > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) > return ret; > > @@ -2430,7 +2426,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req, > struct intel_engine_cs *ring = req->ring; > int ret; > > - ret = intel_ring_begin(ring, 2); > + ret = intel_ring_begin(req, 2); > if (ret) > return ret; > > @@ -2456,7 +2452,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req, > uint32_t cmd; > int ret; > > - ret = intel_ring_begin(ring, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h > index 80eb399..e83fbbb 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h > @@ -386,7 +386,7 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev, > void intel_stop_ring_buffer(struct intel_engine_cs *ring); > void intel_cleanup_ring_buffer(struct intel_engine_cs *ring); > > -int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n); > +int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n); > int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req); > int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring, > struct intel_context *ctx, >
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b5613ff..60f6671 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4656,7 +4656,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice) if (!HAS_L3_DPF(dev) || !remap_info) return 0; - ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3); + ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 384f481..e348424 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -503,7 +503,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags) if (INTEL_INFO(ring->dev)->gen >= 7) len += 2 + (num_rings ? 4*num_rings + 2 : 0); - ret = intel_ring_begin(ring, len); + ret = intel_ring_begin(req, len); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 8b4f8a9..6a703e6 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1013,7 +1013,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, return -EINVAL; } - ret = intel_ring_begin(ring, 4 * 3); + ret = intel_ring_begin(req, 4 * 3); if (ret) return ret; @@ -1044,7 +1044,7 @@ i915_emit_box(struct drm_i915_gem_request *req, } if (INTEL_INFO(ring->dev)->gen >= 4) { - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -1053,7 +1053,7 @@ i915_emit_box(struct drm_i915_gem_request *req, intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16); intel_ring_emit(ring, DR4); } else { - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -1235,7 +1235,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, if (ring == &dev_priv->ring[RCS] && instp_mode != dev_priv->relative_constants_mode) { - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(params->request, 4); if (ret) goto error; diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index a1af644..0445278 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -288,7 +288,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry, BUG_ON(entry >= 4); - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -788,7 +788,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt, if (ret) return ret; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -825,7 +825,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt, if (ret) return ret; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7962946..6901e9a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9259,7 +9259,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev, u32 flip_mask; int ret; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -9294,7 +9294,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev, u32 flip_mask; int ret; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -9327,7 +9327,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev, uint32_t pf, pipesrc; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -9366,7 +9366,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev, uint32_t pf, pipesrc; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -9442,7 +9442,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, if (ret) return ret; - ret = intel_ring_begin(ring, len); + ret = intel_ring_begin(req, len); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 228c9d1..1fb7653 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -251,7 +251,7 @@ static int intel_overlay_on(struct intel_overlay *overlay) if (ret) return ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) { i915_gem_request_unreference(req); return ret; @@ -292,7 +292,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay, if (ret) return ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) { i915_gem_request_unreference(req); return ret; @@ -359,7 +359,7 @@ static int intel_overlay_off(struct intel_overlay *overlay) if (ret) return ret; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) { i915_gem_request_unreference(req); return ret; @@ -434,7 +434,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay) if (ret) return ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) { i915_gem_request_unreference(req); return ret; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6594a52..cc22536 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5012,7 +5012,7 @@ static void ironlake_enable_rc6(struct drm_device *dev) * GPU can automatically power down the render unit if given a page * to save state. */ - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) goto err; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 109f283..5eef02e 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req, if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER) cmd |= MI_READ_FLUSH; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) return ret; @@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req, (IS_G4X(dev) || IS_GEN5(dev))) cmd |= MI_INVALIDATE_ISP; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) return ret; @@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req) u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; int ret; - - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req) intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req, flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL; } - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req) struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -330,7 +329,7 @@ static int gen7_ring_fbc_flush(struct drm_i915_gem_request *req, u32 value) if (!ring->fbc_dirty) return 0; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; /* WaFbcNukeOn3DBlt:ivb/hsw */ @@ -395,7 +394,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req, gen7_render_ring_cs_stall_wa(req); } - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -418,7 +417,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req, struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -760,7 +759,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req) if (ret) return ret; - ret = intel_ring_begin(ring, (w->count * 2 + 2)); + ret = intel_ring_begin(req, (w->count * 2 + 2)); if (ret) return ret; @@ -1119,7 +1118,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req, num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS; #undef MBOX_UPDATE_DWORDS - ret = intel_ring_begin(signaller, num_dwords); + ret = intel_ring_begin(signaller_req, num_dwords); if (ret) return ret; @@ -1160,7 +1159,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req, num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS; #undef MBOX_UPDATE_DWORDS - ret = intel_ring_begin(signaller, num_dwords); + ret = intel_ring_begin(signaller_req, num_dwords); if (ret) return ret; @@ -1199,7 +1198,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req, num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2); #undef MBOX_UPDATE_DWORDS - ret = intel_ring_begin(signaller, num_dwords); + ret = intel_ring_begin(signaller_req, num_dwords); if (ret) return ret; @@ -1237,7 +1236,7 @@ gen6_add_request(struct drm_i915_gem_request *req) if (ring->semaphore.signal) ret = ring->semaphore.signal(req, 4); else - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -1275,7 +1274,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req, struct drm_i915_private *dev_priv = waiter->dev->dev_private; int ret; - ret = intel_ring_begin(waiter, 4); + ret = intel_ring_begin(waiter_req, 4); if (ret) return ret; @@ -1312,7 +1311,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req, WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID); - ret = intel_ring_begin(waiter, 4); + ret = intel_ring_begin(waiter_req, 4); if (ret) return ret; @@ -1357,7 +1356,7 @@ pc_render_add_request(struct drm_i915_gem_request *req) * incoherence by flushing the 6 PIPE_NOTIFY buffers out to * memory before requesting an interrupt. */ - ret = intel_ring_begin(ring, 32); + ret = intel_ring_begin(req, 32); if (ret) return ret; @@ -1542,7 +1541,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req, struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) return ret; @@ -1558,7 +1557,7 @@ i9xx_add_request(struct drm_i915_gem_request *req) struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -1703,7 +1702,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req, struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) return ret; @@ -1731,7 +1730,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req, u32 cs_offset = ring->scratch.gtt_offset; int ret; - ret = intel_ring_begin(ring, 6); + ret = intel_ring_begin(req, 6); if (ret) return ret; @@ -1748,7 +1747,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req, if (len > I830_BATCH_LIMIT) return -ENOSPC; - ret = intel_ring_begin(ring, 6 + 2); + ret = intel_ring_begin(req, 6 + 2); if (ret) return ret; @@ -1771,7 +1770,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req, offset = cs_offset; } - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -1793,7 +1792,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req, struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) return ret; @@ -2232,13 +2231,15 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring, return 0; } -int intel_ring_begin(struct intel_engine_cs *ring, +int intel_ring_begin(struct drm_i915_gem_request *req, int num_dwords) { - struct drm_i915_gem_request *req; + struct intel_engine_cs *ring = req->ring; struct drm_i915_private *dev_priv = ring->dev->dev_private; int ret; + WARN_ON(req == NULL); + ret = i915_gem_check_wedge(&dev_priv->gpu_error, dev_priv->mm.interruptible); if (ret) @@ -2248,11 +2249,6 @@ int intel_ring_begin(struct intel_engine_cs *ring, if (ret) return ret; - /* Preallocate the olr before touching the ring */ - ret = intel_ring_alloc_request(ring, NULL, &req); - if (ret) - return ret; - ring->buffer->space -= num_dwords * sizeof(uint32_t); return 0; } @@ -2268,7 +2264,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req) return 0; num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords; - ret = intel_ring_begin(ring, num_dwords); + ret = intel_ring_begin(req, num_dwords); if (ret) return ret; @@ -2338,7 +2334,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req, uint32_t cmd; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -2385,7 +2381,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req, !(dispatch_flags & I915_DISPATCH_SECURE); int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; @@ -2407,7 +2403,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req, struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) return ret; @@ -2430,7 +2426,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req, struct intel_engine_cs *ring = req->ring; int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(req, 2); if (ret) return ret; @@ -2456,7 +2452,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req, uint32_t cmd; int ret; - ret = intel_ring_begin(ring, 4); + ret = intel_ring_begin(req, 4); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 80eb399..e83fbbb 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -386,7 +386,7 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev, void intel_stop_ring_buffer(struct intel_engine_cs *ring); void intel_cleanup_ring_buffer(struct intel_engine_cs *ring); -int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n); +int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n); int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req); int __must_check intel_ring_alloc_request(struct intel_engine_cs *ring, struct intel_context *ctx,