| Message ID | 1425053469-5139-1-git-send-email-mika.kuoppala@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Feb 27, 2015 at 06:11:09PM +0200, Mika Kuoppala wrote: > commit 05a2fb157e44 ("drm/i915: Consolidate forcewake code") > failed to take into account that we have used to reset both > the gen6 style and the multithreaded style forcewake registers. > This is due to fact that ivb can use either, depending on how the > bios has set up the machine. > > Mimic the old semantics before we have determined the correct variety > and reset both before the ecobus probe. > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Huang Ying <ying.huang@intel.com> > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Lgtm, do we have a reference for the testing scenario that blew up? Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5861
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -4 278/278 274/278
ILK 308/308 308/308
SNB -1 284/284 283/284
IVB 380/380 380/380
BYT 294/294 294/294
HSW 387/387 387/387
BDW -1 316/316 315/316
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gem_fence_thrash_bo-write-verify-none PASS(3) FAIL(1)PASS(1)
*PNV igt_gem_fence_thrash_bo-write-verify-x PASS(3) FAIL(1)PASS(1)
*PNV igt_gem_fence_thrash_bo-write-verify-y PASS(3) FAIL(1)PASS(1)
PNV igt_gen3_render_mixed_blits FAIL(2)PASS(7) FAIL(1)PASS(1)
*SNB igt_gem_flink_bad-open PASS(4) DMESG_WARN(1)PASS(1)
*BDW igt_gem_gtt_hog PASS(9) DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
On Fri, 27 Feb 2015, Chris Wilson <chris@chris-wilson.co.uk> wrote: > On Fri, Feb 27, 2015 at 06:11:09PM +0200, Mika Kuoppala wrote: >> commit 05a2fb157e44 ("drm/i915: Consolidate forcewake code") >> failed to take into account that we have used to reset both >> the gen6 style and the multithreaded style forcewake registers. >> This is due to fact that ivb can use either, depending on how the >> bios has set up the machine. >> >> Mimic the old semantics before we have determined the correct variety >> and reset both before the ecobus probe. >> >> Cc: Chris Wilson <chris@chris-wilson.co.uk> >> Cc: Huang Ying <ying.huang@intel.com> >> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> > > Lgtm, do we have a reference for the testing scenario that blew up? > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Pushed to drm-intel-fixes, thanks for the patch and review. BR, Jani. > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 8879f17..4eb3cb2 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1082,8 +1082,14 @@ static void intel_uncore_fw_domains_init(struct drm_device *dev) /* We need to init first for ECOBUS access and then * determine later if we want to reinit, in case of MT access is - * not working + * not working. In this stage we don't know which flavour this + * ivb is, so it is better to reset also the gen6 fw registers + * before the ecobus check. */ + + __raw_i915_write32(dev_priv, FORCEWAKE, 0); + __raw_posting_read(dev_priv, ECOBUS); + fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER, FORCEWAKE_MT, FORCEWAKE_MT_ACK);
commit 05a2fb157e44 ("drm/i915: Consolidate forcewake code") failed to take into account that we have used to reset both the gen6 style and the multithreaded style forcewake registers. This is due to fact that ivb can use either, depending on how the bios has set up the machine. Mimic the old semantics before we have determined the correct variety and reset both before the ecobus probe. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Huang Ying <ying.huang@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/intel_uncore.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)