| Message ID | 1425086767-1016-6-git-send-email-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
>-----Original Message----- >From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Rodrigo Vivi >Sent: Saturday, February 28, 2015 6:56 AM >To: intel-gfx@lists.freedesktop.org >Cc: Vivi, Rodrigo >Subject: [Intel-gfx] [PATCH 6/7] drm/i915: VLV/CHV PSR: Increase wait delay time before active PSR. > >Since active function on VLV immediately activate PSR let's give more >time for idleness. > >v2: Rebase over intel_psr.c and fix typo. >v3: Revival: Manual tests indicated that this is needed. With a short delay > there is a huge risk of getting blank screens when planes are being enabled. >v4: Revival 2 with reasonable delay. 1/2 sec instead of 5. VBT is 10 sec but > actually time for link training what we aren't doing, but with only 100 sec > in some cases kms_psr_sink_crc manual was showing blank screen, > so let's use this for now. Also changed comment by a FIXME. > Reviewed-by: Durgadoss R <durgadoss.r@intel.com> Thanks, Durga >Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> >--- > drivers/gpu/drm/i915/intel_psr.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c >index c1ca923..3c1d2b3 100644 >--- a/drivers/gpu/drm/i915/intel_psr.c >+++ b/drivers/gpu/drm/i915/intel_psr.c >@@ -648,6 +648,12 @@ void intel_psr_flush(struct drm_device *dev, > struct drm_i915_private *dev_priv = dev->dev_private; > struct drm_crtc *crtc; > enum pipe pipe; >+ /* FIXME: kms_psr_sink_crc in manual mode shows black screen on >+ * the very first primary plane enabling. W/A is to delay >+ * the activate a bit more. On regular use 100 would be enough and >+ * better for good power savings. >+ */ >+ int delay = msecs_to_jiffies(HAS_DDI(dev) ? 100 : 500); > > mutex_lock(&dev_priv->psr.lock); > if (!dev_priv->psr.enabled) { >@@ -680,7 +686,7 @@ void intel_psr_flush(struct drm_device *dev, > > if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) > schedule_delayed_work(&dev_priv->psr.work, >- msecs_to_jiffies(100)); >+ msecs_to_jiffies(delay)); > mutex_unlock(&dev_priv->psr.lock); > } > >-- >1.9.3 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index c1ca923..3c1d2b3 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -648,6 +648,12 @@ void intel_psr_flush(struct drm_device *dev, struct drm_i915_private *dev_priv = dev->dev_private; struct drm_crtc *crtc; enum pipe pipe; + /* FIXME: kms_psr_sink_crc in manual mode shows black screen on + * the very first primary plane enabling. W/A is to delay + * the activate a bit more. On regular use 100 would be enough and + * better for good power savings. + */ + int delay = msecs_to_jiffies(HAS_DDI(dev) ? 100 : 500); mutex_lock(&dev_priv->psr.lock); if (!dev_priv->psr.enabled) { @@ -680,7 +686,7 @@ void intel_psr_flush(struct drm_device *dev, if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) schedule_delayed_work(&dev_priv->psr.work, - msecs_to_jiffies(100)); + msecs_to_jiffies(delay)); mutex_unlock(&dev_priv->psr.lock); }
Since active function on VLV immediately activate PSR let's give more time for idleness. v2: Rebase over intel_psr.c and fix typo. v3: Revival: Manual tests indicated that this is needed. With a short delay there is a huge risk of getting blank screens when planes are being enabled. v4: Revival 2 with reasonable delay. 1/2 sec instead of 5. VBT is 10 sec but actually time for link training what we aren't doing, but with only 100 sec in some cases kms_psr_sink_crc manual was showing blank screen, so let's use this for now. Also changed comment by a FIXME. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/intel_psr.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)