From patchwork Sat Feb 28 01:26:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 5904651 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 104DC9F695 for ; Sat, 28 Feb 2015 01:26:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 44BEC2034C for ; Sat, 28 Feb 2015 01:26:11 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 32BE920320 for ; Sat, 28 Feb 2015 01:26:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 887F16E9C3; Fri, 27 Feb 2015 17:26:09 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F4186E9B7 for ; Fri, 27 Feb 2015 17:26:00 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 27 Feb 2015 17:20:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,664,1418112000"; d="scan'208";a="691889764" Received: from rdvivi-seattle.jf.intel.com ([10.7.196.148]) by orsmga002.jf.intel.com with ESMTP; 27 Feb 2015 17:25:59 -0800 From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Feb 2015 20:26:06 -0500 Message-Id: <1425086767-1016-6-git-send-email-rodrigo.vivi@intel.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1425086767-1016-1-git-send-email-rodrigo.vivi@intel.com> References: <1425086767-1016-1-git-send-email-rodrigo.vivi@intel.com> Cc: Rodrigo Vivi Subject: [Intel-gfx] [PATCH 6/7] drm/i915: VLV/CHV PSR: Increase wait delay time before active PSR. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since active function on VLV immediately activate PSR let's give more time for idleness. v2: Rebase over intel_psr.c and fix typo. v3: Revival: Manual tests indicated that this is needed. With a short delay there is a huge risk of getting blank screens when planes are being enabled. v4: Revival 2 with reasonable delay. 1/2 sec instead of 5. VBT is 10 sec but actually time for link training what we aren't doing, but with only 100 sec in some cases kms_psr_sink_crc manual was showing blank screen, so let's use this for now. Also changed comment by a FIXME. Signed-off-by: Rodrigo Vivi Reviewed-by: Durgadoss R --- drivers/gpu/drm/i915/intel_psr.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index c1ca923..3c1d2b3 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -648,6 +648,12 @@ void intel_psr_flush(struct drm_device *dev, struct drm_i915_private *dev_priv = dev->dev_private; struct drm_crtc *crtc; enum pipe pipe; + /* FIXME: kms_psr_sink_crc in manual mode shows black screen on + * the very first primary plane enabling. W/A is to delay + * the activate a bit more. On regular use 100 would be enough and + * better for good power savings. + */ + int delay = msecs_to_jiffies(HAS_DDI(dev) ? 100 : 500); mutex_lock(&dev_priv->psr.lock); if (!dev_priv->psr.enabled) { @@ -680,7 +686,7 @@ void intel_psr_flush(struct drm_device *dev, if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) schedule_delayed_work(&dev_priv->psr.work, - msecs_to_jiffies(100)); + msecs_to_jiffies(delay)); mutex_unlock(&dev_priv->psr.lock); }