Message ID | 1425379423-1781-1-git-send-email-tim.gore@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Mar 03, 2015 at 10:43:43AM +0000, tim.gore@intel.com wrote: > From: Tim Gore <tim.gore@intel.com> > > The gem_render_tiled_blits test tends to get oom killed > on low memory (< 4GB) Android systems. This is because the > test tries to allocate (sysinfo.totalram * 9 / 10) in > buffer objects and the remaining 10% of memory is not > always enough for the Android system. > A similar issue with gem_render_linear_blits was resolved > by creating several subtests. A "basic" subtest that uses > minimal memory buffers to test the basic operation, and > two stress tests which are skipped if there is insufficient > memory. The first stress test uses more memory than the > graphics apperture and the second uses enough to ensure > that swap space is used (if present). > This patch makes the same changes to gem_render_tiled_blits. > > v2: Following comments from Daniel Vetter: > a) Use igt_main macro instead of "open coding", and > b) cull some leading spaces > > Signed-off-by: Tim Gore <tim.gore@intel.com> Both patches applied, thanks. -Daniel > --- > tests/gem_render_tiled_blits.c | 72 ++++++++++++++++++++++++++---------------- > 1 file changed, 45 insertions(+), 27 deletions(-) > > diff --git a/tests/gem_render_tiled_blits.c b/tests/gem_render_tiled_blits.c > index dc22529..f669270 100644 > --- a/tests/gem_render_tiled_blits.c > +++ b/tests/gem_render_tiled_blits.c > @@ -85,30 +85,25 @@ check_bo(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t val) > } > for (i = 0; i < WIDTH*HEIGHT; i++) { > igt_assert_f(ptr[i] == val, > - "Expected 0x%08x, found 0x%08x " > - "at offset 0x%08x\n", > - val, ptr[i], i * 4); > + "Expected 0x%08x, found 0x%08x " > + "at offset 0x%08x\n", > + val, ptr[i], i * 4); > val++; > } > if (ptr != data) > dri_bo_unmap(linear); > } > > -int main(int argc, char **argv) > +static void run_test (int fd, int count) > { > drm_intel_bufmgr *bufmgr; > struct intel_batchbuffer *batch; > uint32_t *start_val; > struct igt_buf *buf; > uint32_t start = 0; > - int i, j, fd, count; > + int i, j; > uint32_t devid; > > - igt_simple_init(argc, argv); > - > - igt_skip_on_simulation(); > - > - fd = drm_open_any(); > devid = intel_get_drm_devid(fd); > > render_copy = igt_get_render_copyfunc(devid); > @@ -124,23 +119,6 @@ int main(int argc, char **argv) > drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32); > batch = intel_batchbuffer_alloc(bufmgr, devid); > > - count = 0; > - if (argc > 1) > - count = atoi(argv[1]); > - if (count == 0) > - count = 3 * gem_aperture_size(fd) / SIZE / 2; > - else if (count < 2) { > - igt_warn("count must be >= 2\n"); > - return 1; > - } > - > - if (count > intel_get_total_ram_mb() * 9 / 10) { > - count = intel_get_total_ram_mb() * 9 / 10; > - igt_info("not enough RAM to run test, reducing buffer count\n"); > - } > - > - igt_info("Using %d 1MiB buffers\n", count); > - > linear = drm_intel_bo_alloc(bufmgr, "linear", WIDTH*HEIGHT*4, 0); > if (snoop) { > gem_set_caching(fd, linear->handle, 1); > @@ -211,5 +189,45 @@ int main(int argc, char **argv) > for (i = 0; i < count; i++) > check_bo(batch, &buf[i], start_val[i]); > > + /* release resources */ > + drm_intel_bo_unreference(linear); > + for (i = 0; i < count; i++) { > + drm_intel_bo_unreference(buf[i].bo); > + } > + intel_batchbuffer_free(batch); > + drm_intel_bufmgr_destroy(bufmgr); > +} > + > + > +igt_main > +{ > + int fd = 0; > + int count = 0; > + > + igt_fixture { > + fd = drm_open_any(); > + } > + > + igt_subtest("basic") { > + run_test(fd, 2); > + } > + > + /* the rest of the tests are too long for simulation */ > + igt_skip_on_simulation(); > + > + igt_subtest("apperture-thrash") { > + count = 3 * gem_aperture_size(fd) / SIZE / 2; > + intel_require_memory(count, SIZE, CHECK_RAM); > + run_test(fd, count); > + } > + > + igt_subtest("swap-thrash") { > + uint64_t swap_mb = intel_get_total_swap_mb(); > + igt_require(swap_mb > 0); > + count = ((intel_get_avail_ram_mb() + (swap_mb / 2)) * 1024*1024) / SIZE; > + intel_require_memory(count, SIZE, CHECK_RAM | CHECK_SWAP); > + run_test(fd, count); > + } > + > igt_exit(); > } > -- > 2.3.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/tests/gem_render_tiled_blits.c b/tests/gem_render_tiled_blits.c index dc22529..f669270 100644 --- a/tests/gem_render_tiled_blits.c +++ b/tests/gem_render_tiled_blits.c @@ -85,30 +85,25 @@ check_bo(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t val) } for (i = 0; i < WIDTH*HEIGHT; i++) { igt_assert_f(ptr[i] == val, - "Expected 0x%08x, found 0x%08x " - "at offset 0x%08x\n", - val, ptr[i], i * 4); + "Expected 0x%08x, found 0x%08x " + "at offset 0x%08x\n", + val, ptr[i], i * 4); val++; } if (ptr != data) dri_bo_unmap(linear); } -int main(int argc, char **argv) +static void run_test (int fd, int count) { drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; uint32_t *start_val; struct igt_buf *buf; uint32_t start = 0; - int i, j, fd, count; + int i, j; uint32_t devid; - igt_simple_init(argc, argv); - - igt_skip_on_simulation(); - - fd = drm_open_any(); devid = intel_get_drm_devid(fd); render_copy = igt_get_render_copyfunc(devid); @@ -124,23 +119,6 @@ int main(int argc, char **argv) drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32); batch = intel_batchbuffer_alloc(bufmgr, devid); - count = 0; - if (argc > 1) - count = atoi(argv[1]); - if (count == 0) - count = 3 * gem_aperture_size(fd) / SIZE / 2; - else if (count < 2) { - igt_warn("count must be >= 2\n"); - return 1; - } - - if (count > intel_get_total_ram_mb() * 9 / 10) { - count = intel_get_total_ram_mb() * 9 / 10; - igt_info("not enough RAM to run test, reducing buffer count\n"); - } - - igt_info("Using %d 1MiB buffers\n", count); - linear = drm_intel_bo_alloc(bufmgr, "linear", WIDTH*HEIGHT*4, 0); if (snoop) { gem_set_caching(fd, linear->handle, 1); @@ -211,5 +189,45 @@ int main(int argc, char **argv) for (i = 0; i < count; i++) check_bo(batch, &buf[i], start_val[i]); + /* release resources */ + drm_intel_bo_unreference(linear); + for (i = 0; i < count; i++) { + drm_intel_bo_unreference(buf[i].bo); + } + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); +} + + +igt_main +{ + int fd = 0; + int count = 0; + + igt_fixture { + fd = drm_open_any(); + } + + igt_subtest("basic") { + run_test(fd, 2); + } + + /* the rest of the tests are too long for simulation */ + igt_skip_on_simulation(); + + igt_subtest("apperture-thrash") { + count = 3 * gem_aperture_size(fd) / SIZE / 2; + intel_require_memory(count, SIZE, CHECK_RAM); + run_test(fd, count); + } + + igt_subtest("swap-thrash") { + uint64_t swap_mb = intel_get_total_swap_mb(); + igt_require(swap_mb > 0); + count = ((intel_get_avail_ram_mb() + (swap_mb / 2)) * 1024*1024) / SIZE; + intel_require_memory(count, SIZE, CHECK_RAM | CHECK_SWAP); + run_test(fd, count); + } + igt_exit(); }