From patchwork Thu Mar 5 09:21:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sonika.jindal@intel.com X-Patchwork-Id: 5944271 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 482DABF6C3 for ; Thu, 5 Mar 2015 09:29:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80EC920382 for ; Thu, 5 Mar 2015 09:29:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A35BA2034C for ; Thu, 5 Mar 2015 09:29:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DF026E77C; Thu, 5 Mar 2015 01:29:22 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 8052B6E77C for ; Thu, 5 Mar 2015 01:29:21 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP; 05 Mar 2015 01:29:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,345,1422950400"; d="scan'208";a="462838568" Received: from sonikaji-desktop.iind.intel.com ([10.223.25.81]) by FMSMGA003.fm.intel.com with ESMTP; 05 Mar 2015 01:23:00 -0800 From: Sonika Jindal To: intel-gfx@lists.freedesktop.org Date: Thu, 5 Mar 2015 14:51:27 +0530 Message-Id: <1425547288-16131-2-git-send-email-sonika.jindal@intel.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1425547288-16131-1-git-send-email-sonika.jindal@intel.com> References: <1425547288-16131-1-git-send-email-sonika.jindal@intel.com> Subject: [Intel-gfx] [PATCH 2/3] drm/i915: Using plane state parameters instead of pipe's X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For primary plane, we can use the plane's state for src width and height like sprite plane. Signed-off-by: Sonika Jindal --- drivers/gpu/drm/i915/intel_display.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e1b0c4d..afdc101 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3001,6 +3001,7 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc, int pipe = intel_crtc->pipe; u32 plane_ctl, stride_div; unsigned long surf_addr; + struct drm_plane *plane; if (!intel_crtc->primary_enabled) { I915_WRITE(PLANE_CTL(pipe, 0), 0); @@ -3060,14 +3061,15 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc, MISSING_CASE(fb->modifier[0]); } + plane = crtc->primary; plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE; - if (crtc->primary->state->rotation == BIT(DRM_ROTATE_180)) + if (plane->state->rotation == BIT(DRM_ROTATE_180)) plane_ctl |= PLANE_CTL_ROTATE_180; obj = intel_fb_obj(fb); stride_div = intel_fb_stride_alignment(dev, fb->modifier[0], fb->pixel_format); - surf_addr = intel_plane_obj_offset(to_intel_plane(crtc->primary), obj); + surf_addr = intel_plane_obj_offset(to_intel_plane(plane), obj); I915_WRITE(PLANE_CTL(pipe, 0), plane_ctl); @@ -3079,8 +3081,8 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc, I915_WRITE(PLANE_POS(pipe, 0), 0); I915_WRITE(PLANE_OFFSET(pipe, 0), (y << 16) | x); I915_WRITE(PLANE_SIZE(pipe, 0), - (intel_crtc->config->pipe_src_h - 1) << 16 | - (intel_crtc->config->pipe_src_w - 1)); + ((plane->state->src_h >> 16) - 1) << 16 | + ((plane->state->src_w >> 16) - 1)); I915_WRITE(PLANE_STRIDE(pipe, 0), fb->pitches[0] / stride_div); I915_WRITE(PLANE_SURF(pipe, 0), surf_addr);