| Message ID | 1426585215-8788-28-git-send-email-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, 17 Mar 2015, Imre Deak <imre.deak@intel.com> wrote: > From: Shashank Sharma <shashank.sharma@intel.com> > > GMBUS interrupt has been moved to CPU side in BXT. > What this patch does is: > 1. Enable GMBUS IRQ in de_post_install function > 2. Handle this interrupt as a port interrupt in display irq > handler > > v2: Rebase on top of the for_each_pipe() change adding dev_priv as > first argument (Damien). > v3: read BXT_DE_PORT_GMBUS IIR flag only on BXT on other platforms > it's reserved (imre) > > Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> > Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> (v1) > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/i915_irq.c | 14 +++++++++++--- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > 2 files changed, 14 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 3b82eb2..2be167c 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2319,6 +2319,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) > found = true; > } > > + if (IS_BROXTON(dev) && (tmp & BXT_DE_PORT_GMBUS)) { > + gmbus_irq_handler(dev); > + found = true; > + } > + > if (!found) > DRM_ERROR("Unexpected DE Port interrupt\n"); > } > @@ -3596,13 +3601,16 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) > uint32_t de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE; > uint32_t de_pipe_enables; > int pipe; > - u32 aux_en = GEN8_AUX_CHANNEL_A; > + u32 de_port_en = GEN8_AUX_CHANNEL_A; > > if (IS_GEN9(dev_priv)) { > de_pipe_masked |= GEN9_PIPE_PLANE1_FLIP_DONE | > GEN9_DE_PIPE_IRQ_FAULT_ERRORS; > - aux_en |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | > + de_port_en |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | > GEN9_AUX_CHANNEL_D; > + > + if (IS_BROXTON(dev_priv)) > + de_port_en |= BXT_DE_PORT_GMBUS; > } else > de_pipe_masked |= GEN8_PIPE_PRIMARY_FLIP_DONE | > GEN8_DE_PIPE_IRQ_FAULT_ERRORS; > @@ -3621,7 +3629,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) > dev_priv->de_irq_mask[pipe], > de_pipe_enables); > > - GEN5_IRQ_INIT(GEN8_DE_PORT_, ~aux_en, aux_en); > + GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_en, de_port_en); > } > > static int gen8_irq_postinstall(struct drm_device *dev) > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 1efee7d..b4474d3 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5255,6 +5255,9 @@ enum skl_disp_power_wells { > BXT_DE_PORT_HP_DDIB | \ > BXT_DE_PORT_HP_DDIC) > > +/* BXT GMBUS */ That's obvious from the define, no need for the comment, just move this right next to the other bit definitions above and put two spaces after #define. With that done, Reviewed-by: Jani Nikula <jani.nikula@intel.com> > +#define BXT_DE_PORT_GMBUS (1 << 1) > + > #define GEN8_DE_MISC_ISR 0x44460 > #define GEN8_DE_MISC_IMR 0x44464 > #define GEN8_DE_MISC_IIR 0x44468 > -- > 2.1.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 3b82eb2..2be167c 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2319,6 +2319,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) found = true; } + if (IS_BROXTON(dev) && (tmp & BXT_DE_PORT_GMBUS)) { + gmbus_irq_handler(dev); + found = true; + } + if (!found) DRM_ERROR("Unexpected DE Port interrupt\n"); } @@ -3596,13 +3601,16 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) uint32_t de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE; uint32_t de_pipe_enables; int pipe; - u32 aux_en = GEN8_AUX_CHANNEL_A; + u32 de_port_en = GEN8_AUX_CHANNEL_A; if (IS_GEN9(dev_priv)) { de_pipe_masked |= GEN9_PIPE_PLANE1_FLIP_DONE | GEN9_DE_PIPE_IRQ_FAULT_ERRORS; - aux_en |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | + de_port_en |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | GEN9_AUX_CHANNEL_D; + + if (IS_BROXTON(dev_priv)) + de_port_en |= BXT_DE_PORT_GMBUS; } else de_pipe_masked |= GEN8_PIPE_PRIMARY_FLIP_DONE | GEN8_DE_PIPE_IRQ_FAULT_ERRORS; @@ -3621,7 +3629,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) dev_priv->de_irq_mask[pipe], de_pipe_enables); - GEN5_IRQ_INIT(GEN8_DE_PORT_, ~aux_en, aux_en); + GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_en, de_port_en); } static int gen8_irq_postinstall(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1efee7d..b4474d3 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5255,6 +5255,9 @@ enum skl_disp_power_wells { BXT_DE_PORT_HP_DDIB | \ BXT_DE_PORT_HP_DDIC) +/* BXT GMBUS */ +#define BXT_DE_PORT_GMBUS (1 << 1) + #define GEN8_DE_MISC_ISR 0x44460 #define GEN8_DE_MISC_IMR 0x44464 #define GEN8_DE_MISC_IIR 0x44468