[49/59] drm/i915: Update intel_ring_begin() to take a request structure

Commit Message

John Harrison March 19, 2015, 12:30 p.m. UTC

From: John Harrison <[e-mail]>

Now that everything above has been converted to use requests, intel_ring_begin()
can be updated to take a request instead of a ring. This also means that it no
longer needs to lazily allocate a request if no-one happens to have done it
earlier.

For: VIZ-5115
Signed-off-by: John Harrison <[e-mail]>
---
 drivers/gpu/drm/i915/i915_gem.c            |    2 +-
 drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    8 +--
 drivers/gpu/drm/i915/i915_gem_gtt.c        |    6 +--
 drivers/gpu/drm/i915/intel_display.c       |   10 ++--
 drivers/gpu/drm/i915/intel_overlay.c       |    8 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   74 ++++++++++++++--------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
 8 files changed, 55 insertions(+), 57 deletions(-)

Comments

Tomas Elf March 31, 2015, 5:04 p.m. UTC | #1

On 19/03/2015 12:30, [e-mail] wrote:
> From: John Harrison <[e-mail]>
>
> Now that everything above has been converted to use requests, intel_ring_begin()
> can be updated to take a request instead of a ring. This also means that it no
> longer needs to lazily allocate a request if no-one happens to have done it
> earlier.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <[e-mail]>
> ---
>   drivers/gpu/drm/i915/i915_gem.c            |    2 +-
>   drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    8 +--
>   drivers/gpu/drm/i915/i915_gem_gtt.c        |    6 +--
>   drivers/gpu/drm/i915/intel_display.c       |   10 ++--
>   drivers/gpu/drm/i915/intel_overlay.c       |    8 +--
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   74 ++++++++++++++--------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
>   8 files changed, 55 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 7304290..b047693 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4711,7 +4711,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
>   	if (!HAS_L3_DPF(dev) || !remap_info)
>   		return 0;
>
> -	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
> +	ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 2c94c88..369e58d 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -507,7 +507,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
>   	if (INTEL_INFO(ring->dev)->gen >= 7)
>   		len += 2 + (num_rings ? 4*num_rings + 2 : 0);
>
> -	ret = intel_ring_begin(ring, len);
> +	ret = intel_ring_begin(req, len);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index cb24ca7..9345db8 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1076,7 +1076,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
>   		return -EINVAL;
>   	}
>
> -	ret = intel_ring_begin(ring, 4 * 3);
> +	ret = intel_ring_begin(req, 4 * 3);
>   	if (ret)
>   		return ret;
>
> @@ -1107,7 +1107,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
>   	}
>
>   	if (INTEL_INFO(ring->dev)->gen >= 4) {
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(req, 4);
>   		if (ret)
>   			return ret;
>
> @@ -1116,7 +1116,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
>   		intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16);
>   		intel_ring_emit(ring, DR4);
>   	} else {
> -		ret = intel_ring_begin(ring, 6);
> +		ret = intel_ring_begin(req, 6);
>   		if (ret)
>   			return ret;
>
> @@ -1287,7 +1287,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>
>   	if (ring == &dev_priv->ring[RCS] &&
>   			instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(params->request, 4);
>   		if (ret)
>   			goto error;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 5822429..7b656c8 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -382,7 +382,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
>
>   	BUG_ON(entry >= 4);
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -889,7 +889,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -926,7 +926,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 277c73a..665e8cc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9426,7 +9426,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
>   	u32 flip_mask;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -9461,7 +9461,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
>   	u32 flip_mask;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -9494,7 +9494,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
>   	uint32_t pf, pipesrc;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -9533,7 +9533,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
>   	uint32_t pf, pipesrc;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -9609,7 +9609,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, len);
> +	ret = intel_ring_begin(req, len);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index 9eea308..2ed4422 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -247,7 +247,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret) {
>   		i915_gem_request_cancel(req);
>   		return ret;
> @@ -288,7 +288,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret) {
>   		i915_gem_request_cancel(req);
>   		return ret;
> @@ -353,7 +353,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret) {
>   		i915_gem_request_cancel(req);
>   		return ret;
> @@ -428,7 +428,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
>   		if (ret)
>   			return ret;
>
> -		ret = intel_ring_begin(ring, 2);
> +		ret = intel_ring_begin(req, 2);
>   		if (ret) {
>   			i915_gem_request_cancel(req);
>   			return ret;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 9cbc4ef..6f198df 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req,
>   	if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
>   		cmd |= MI_READ_FLUSH;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
>   	    (IS_G4X(dev) || IS_GEN5(dev)))
>   		cmd |= MI_INVALIDATE_ISP;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
>
> -
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_advance(ring);
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
>   		flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -371,7 +370,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
>   		gen7_render_ring_cs_stall_wa(req);
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -391,7 +390,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -726,7 +725,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, (w->count * 2 + 2));
> +	ret = intel_ring_begin(req, (w->count * 2 + 2));
>   	if (ret)
>   		return ret;
>
> @@ -1136,7 +1135,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1177,7 +1176,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1216,7 +1215,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1254,7 +1253,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
>   	if (ring->semaphore.signal)
>   		ret = ring->semaphore.signal(req, 4);
>   	else
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(req, 4);
>
>   	if (ret)
>   		return ret;
> @@ -1292,7 +1291,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
>   	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
>   	int ret;
>
> -	ret = intel_ring_begin(waiter, 4);
> +	ret = intel_ring_begin(waiter_req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1329,7 +1328,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
>
>   	WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID);
>
> -	ret = intel_ring_begin(waiter, 4);
> +	ret = intel_ring_begin(waiter_req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1374,7 +1373,7 @@ pc_render_add_request(struct drm_i915_gem_request *req)
>   	 * incoherence by flushing the 6 PIPE_NOTIFY buffers out to
>   	 * memory before requesting an interrupt.
>   	 */
> -	ret = intel_ring_begin(ring, 32);
> +	ret = intel_ring_begin(req, 32);
>   	if (ret)
>   		return ret;
>
> @@ -1559,7 +1558,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -1575,7 +1574,7 @@ i9xx_add_request(struct drm_i915_gem_request *req)
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1720,7 +1719,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -1748,7 +1747,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	u32 cs_offset = ring->scratch.gtt_offset;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -1765,7 +1764,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   		if (len > I830_BATCH_LIMIT)
>   			return -ENOSPC;
>
> -		ret = intel_ring_begin(ring, 6 + 2);
> +		ret = intel_ring_begin(req, 6 + 2);
>   		if (ret)
>   			return ret;
>
> @@ -1788,7 +1787,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   		offset = cs_offset;
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1810,7 +1809,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2264,13 +2263,17 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
>   	return 0;
>   }
>
> -int intel_ring_begin(struct intel_engine_cs *ring,
> +int intel_ring_begin(struct drm_i915_gem_request *req,
>   		     int num_dwords)
>   {
> -	struct drm_i915_gem_request *req;
> -	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +	struct intel_engine_cs *ring;
> +	struct drm_i915_private *dev_priv;
>   	int ret;
>
> +	WARN_ON(req == NULL);
> +	ring = req->ring;
> +	dev_priv = ring->dev->dev_private;
> +
>   	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
>   				   dev_priv->mm.interruptible);
>   	if (ret)
> @@ -2280,11 +2283,6 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   	if (ret)
>   		return ret;
>
> -	/* Preallocate the olr before touching the ring */
> -	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
> -	if (ret)
> -		return ret;
> -
>   	ring->buffer->space -= num_dwords * sizeof(uint32_t);
>   	return 0;
>   }
> @@ -2300,7 +2298,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
>   		return 0;
>
>   	num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords;
> -	ret = intel_ring_begin(ring, num_dwords);
> +	ret = intel_ring_begin(req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -2370,7 +2368,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -2417,7 +2415,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			!(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -2439,7 +2437,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2462,7 +2460,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2487,7 +2485,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index e353531..f6ab6bb 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -391,7 +391,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
>
>   int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request);
>
> -int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
> +int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n);
>   int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
>   static inline void intel_ring_emit(struct intel_engine_cs *ring,
>   				   u32 data)
>

Reviewed-by: Tomas Elf <[e-mail]>

Thanks,
Tomas

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 7304290..b047693 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4711,7 +4711,7 @@  int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 	if (!HAS_L3_DPF(dev) || !remap_info)
 		return 0;
 
-	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
+	ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 2c94c88..369e58d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -507,7 +507,7 @@  mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	if (INTEL_INFO(ring->dev)->gen >= 7)
 		len += 2 + (num_rings ? 4*num_rings + 2 : 0);
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index cb24ca7..9345db8 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1076,7 +1076,7 @@  i915_reset_gen7_sol_offsets(struct drm_device *dev,
 		return -EINVAL;
 	}
 
-	ret = intel_ring_begin(ring, 4 * 3);
+	ret = intel_ring_begin(req, 4 * 3);
 	if (ret)
 		return ret;
 
@@ -1107,7 +1107,7 @@  i915_emit_box(struct drm_i915_gem_request *req,
 	}
 
 	if (INTEL_INFO(ring->dev)->gen >= 4) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 		if (ret)
 			return ret;
 
@@ -1116,7 +1116,7 @@  i915_emit_box(struct drm_i915_gem_request *req,
 		intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16);
 		intel_ring_emit(ring, DR4);
 	} else {
-		ret = intel_ring_begin(ring, 6);
+		ret = intel_ring_begin(req, 6);
 		if (ret)
 			return ret;
 
@@ -1287,7 +1287,7 @@  i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	if (ring == &dev_priv->ring[RCS] &&
 			instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(params->request, 4);
 		if (ret)
 			goto error;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5822429..7b656c8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -382,7 +382,7 @@  static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
 
 	BUG_ON(entry >= 4);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -889,7 +889,7 @@  static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -926,7 +926,7 @@  static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 277c73a..665e8cc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9426,7 +9426,7 @@  static int intel_gen2_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9461,7 +9461,7 @@  static int intel_gen3_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9494,7 +9494,7 @@  static int intel_gen4_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9533,7 +9533,7 @@  static int intel_gen6_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9609,7 +9609,7 @@  static int intel_gen7_queue_flip(struct drm_device *dev,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 9eea308..2ed4422 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -247,7 +247,7 @@  static int intel_overlay_on(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret) {
 		i915_gem_request_cancel(req);
 		return ret;
@@ -288,7 +288,7 @@  static int intel_overlay_continue(struct intel_overlay *overlay,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret) {
 		i915_gem_request_cancel(req);
 		return ret;
@@ -353,7 +353,7 @@  static int intel_overlay_off(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret) {
 		i915_gem_request_cancel(req);
 		return ret;
@@ -428,7 +428,7 @@  static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 		if (ret)
 			return ret;
 
-		ret = intel_ring_begin(ring, 2);
+		ret = intel_ring_begin(req, 2);
 		if (ret) {
 			i915_gem_request_cancel(req);
 			return ret;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 9cbc4ef..6f198df 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -106,7 +106,7 @@  gen2_render_ring_flush(struct drm_i915_gem_request *req,
 	if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
 		cmd |= MI_READ_FLUSH;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -165,7 +165,7 @@  gen4_render_ring_flush(struct drm_i915_gem_request *req,
 	    (IS_G4X(dev) || IS_GEN5(dev)))
 		cmd |= MI_INVALIDATE_ISP;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -220,8 +220,7 @@  intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
-
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -234,7 +233,7 @@  intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -289,7 +288,7 @@  gen6_render_ring_flush(struct drm_i915_gem_request *req,
 		flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -308,7 +307,7 @@  gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -371,7 +370,7 @@  gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		gen7_render_ring_cs_stall_wa(req);
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -391,7 +390,7 @@  gen8_emit_pipe_control(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -726,7 +725,7 @@  static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, (w->count * 2 + 2));
+	ret = intel_ring_begin(req, (w->count * 2 + 2));
 	if (ret)
 		return ret;
 
@@ -1136,7 +1135,7 @@  static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1177,7 +1176,7 @@  static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1216,7 +1215,7 @@  static int gen6_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1254,7 +1253,7 @@  gen6_add_request(struct drm_i915_gem_request *req)
 	if (ring->semaphore.signal)
 		ret = ring->semaphore.signal(req, 4);
 	else
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 
 	if (ret)
 		return ret;
@@ -1292,7 +1291,7 @@  gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
 	int ret;
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1329,7 +1328,7 @@  gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
 
 	WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID);
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1374,7 +1373,7 @@  pc_render_add_request(struct drm_i915_gem_request *req)
 	 * incoherence by flushing the 6 PIPE_NOTIFY buffers out to
 	 * memory before requesting an interrupt.
 	 */
-	ret = intel_ring_begin(ring, 32);
+	ret = intel_ring_begin(req, 32);
 	if (ret)
 		return ret;
 
@@ -1559,7 +1558,7 @@  bsd_ring_flush(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1575,7 +1574,7 @@  i9xx_add_request(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1720,7 +1719,7 @@  i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1748,7 +1747,7 @@  i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -1765,7 +1764,7 @@  i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		if (len > I830_BATCH_LIMIT)
 			return -ENOSPC;
 
-		ret = intel_ring_begin(ring, 6 + 2);
+		ret = intel_ring_begin(req, 6 + 2);
 		if (ret)
 			return ret;
 
@@ -1788,7 +1787,7 @@  i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		offset = cs_offset;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1810,7 +1809,7 @@  i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2264,13 +2263,17 @@  static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
 	return 0;
 }
 
-int intel_ring_begin(struct intel_engine_cs *ring,
+int intel_ring_begin(struct drm_i915_gem_request *req,
 		     int num_dwords)
 {
-	struct drm_i915_gem_request *req;
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct intel_engine_cs *ring;
+	struct drm_i915_private *dev_priv;
 	int ret;
 
+	WARN_ON(req == NULL);
+	ring = req->ring;
+	dev_priv = ring->dev->dev_private;
+
 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
 				   dev_priv->mm.interruptible);
 	if (ret)
@@ -2280,11 +2283,6 @@  int intel_ring_begin(struct intel_engine_cs *ring,
 	if (ret)
 		return ret;
 
-	/* Preallocate the olr before touching the ring */
-	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
-	if (ret)
-		return ret;
-
 	ring->buffer->space -= num_dwords * sizeof(uint32_t);
 	return 0;
 }
@@ -2300,7 +2298,7 @@  int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
 		return 0;
 
 	num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords;
-	ret = intel_ring_begin(ring, num_dwords);
+	ret = intel_ring_begin(req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -2370,7 +2368,7 @@  static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2417,7 +2415,7 @@  gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2439,7 +2437,7 @@  hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2462,7 +2460,7 @@  gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2487,7 +2485,7 @@  static int gen6_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index e353531..f6ab6bb 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -391,7 +391,7 @@  void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
 int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request);
 
-int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
+int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n);
 int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
 				   u32 data)