From patchwork Tue Mar 24 14:16:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tim.gore@intel.com X-Patchwork-Id: 6079931 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 55D80BF90F for ; Tue, 24 Mar 2015 14:16:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5F46C2017E for ; Tue, 24 Mar 2015 14:16:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6C1F32015A for ; Tue, 24 Mar 2015 14:16:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 056F46E26D; Tue, 24 Mar 2015 07:16:08 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id CBB696E26D for ; Tue, 24 Mar 2015 07:16:06 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 24 Mar 2015 07:16:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,458,1422950400"; d="scan'208";a="684835822" Received: from tgore-linux.isw.intel.com ([10.102.226.44]) by fmsmga001.fm.intel.com with ESMTP; 24 Mar 2015 07:16:06 -0700 From: tim.gore@intel.com To: intel-gfx@lists.freedesktop.org Date: Tue, 24 Mar 2015 14:16:04 +0000 Message-Id: <1427206564-9946-1-git-send-email-tim.gore@intel.com> X-Mailer: git-send-email 2.3.0 Subject: [Intel-gfx] [PATCH i-g-t] tests/gem_tiled_fence_blits: split into subtests X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tim Gore The gem_tiled_fence_blits test tends to get oom killed on low memory (< 4GB) Android systems. This is because the test tries to allocate (sysinfo.totalram * 9 / 10) in buffer objects and the remaining 10% of memory is not always enough for the Android system. As with a similar issue with gem_render_linear_blits, this problem is resolved by splitting into subtests. A "basic" subtest uses minimal memory buffers to test the basic operation, and a "normal" subtest which is skipped if there is insufficient memory. I also took the opportunity to cull some numeric literals. Signed-off-by: Tim Gore Reviewed-by: Chris Wilson --- tests/gem_tiled_fence_blits.c | 51 ++++++++++++++++++++++++++++--------------- 1 file changed, 33 insertions(+), 18 deletions(-) diff --git a/tests/gem_tiled_fence_blits.c b/tests/gem_tiled_fence_blits.c index c852207..5dd5bbe 100644 --- a/tests/gem_tiled_fence_blits.c +++ b/tests/gem_tiled_fence_blits.c @@ -62,8 +62,9 @@ static drm_intel_bufmgr *bufmgr; struct intel_batchbuffer *batch; -static int width = 512, height = 512; -static uint32_t linear[1024*1024/4]; +enum {width=512, height=512}; +static const int bo_size = width * height * 4; +static uint32_t linear[width * height]; static drm_intel_bo * create_bo(int fd, uint32_t start_val) @@ -72,13 +73,13 @@ create_bo(int fd, uint32_t start_val) uint32_t tiling = I915_TILING_X; int ret, i; - bo = drm_intel_bo_alloc(bufmgr, "tiled bo", 1024 * 1024, 4096); + bo = drm_intel_bo_alloc(bufmgr, "tiled bo", bo_size, 4096); ret = drm_intel_bo_set_tiling(bo, &tiling, width * 4); igt_assert_eq(ret, 0); igt_assert(tiling == I915_TILING_X); /* Fill the BO with dwords starting at start_val */ - for (i = 0; i < 1024 * 1024 / 4; i++) + for (i = 0; i < width * height; i++) linear[i] = start_val++; gem_write(fd, bo->handle, 0, linear, sizeof(linear)); @@ -93,7 +94,7 @@ check_bo(int fd, drm_intel_bo *bo, uint32_t start_val) gem_read(fd, bo->handle, 0, linear, sizeof(linear)); - for (i = 0; i < 1024 * 1024 / 4; i++) { + for (i = 0; i < width * height; i++) { igt_assert_f(linear[i] == start_val, "Expected 0x%08x, found 0x%08x " "at offset 0x%08x\n", @@ -102,21 +103,13 @@ check_bo(int fd, drm_intel_bo *bo, uint32_t start_val) } } -igt_simple_main +static void run_test (int fd, int count) { drm_intel_bo *bo[4096]; uint32_t bo_start_val[4096]; uint32_t start = 0; - int fd, i, count; - - igt_skip_on_simulation(); + int i; - fd = drm_open_any(); - count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; - if (count > intel_get_total_ram_mb() * 9 / 10) { - count = intel_get_total_ram_mb() * 9 / 10; - igt_info("not enough RAM to run test, reducing buffer count\n"); - } count |= 1; igt_info("Using %d 1MiB buffers\n", count); @@ -133,12 +126,12 @@ igt_simple_main check_bo(bo[i], bo_start_val[i]); */ - start += 1024 * 1024 / 4; + start += width * height; } for (i = 0; i < count; i++) { int src = count - i - 1; - intel_copy_bo(batch, bo[i], bo[src], width*height*4); + intel_copy_bo(batch, bo[i], bo[src], bo_size); bo_start_val[i] = bo_start_val[src]; } @@ -149,7 +142,7 @@ igt_simple_main if (src == dst) continue; - intel_copy_bo(batch, bo[dst], bo[src], width*height*4); + intel_copy_bo(batch, bo[dst], bo[src], bo_size); bo_start_val[dst] = bo_start_val[src]; /* @@ -170,6 +163,28 @@ igt_simple_main intel_batchbuffer_free(batch); drm_intel_bufmgr_destroy(bufmgr); +} + +igt_main +{ + int fd, count; + + igt_fixture { + fd = drm_open_any(); + } + + igt_subtest("basic") { + run_test (fd, 2); + } + + /* the rest of the tests are too long for simulation */ + igt_skip_on_simulation(); + + igt_subtest("normal") { + count = 3 * gem_aperture_size(fd) / (bo_size) / 2; + intel_require_memory(count, bo_size, CHECK_RAM); + run_test(fd, count); + } close(fd); }