| Message ID | 1427882025-28421-1-git-send-email-tvrtko.ursulin@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Apr 01, 2015 at 10:53:45AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Makes it easier for userspace to start supporting Y tiled display, > for at least the legacy format. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> For the record: The point here is that we'll get a user for fb modifiers by enabling Y tiling, not enabling Y tiling itself ... On that goal this patch falls short, so nacked. -Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 1813190..de50631 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -13347,10 +13347,19 @@ static int intel_framebuffer_init(struct drm_device *dev, > return -EINVAL; > } > } else { > - if (obj->tiling_mode == I915_TILING_X) > + switch (obj->tiling_mode) { > + case I915_TILING_NONE: > + mode_cmd->modifier[0] = DRM_FORMAT_MOD_NONE; > + break; > + case I915_TILING_X: > mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED; > - else if (obj->tiling_mode == I915_TILING_Y) { > - DRM_DEBUG("No Y tiling for legacy addfb\n"); > + break; > + case I915_TILING_Y: > + mode_cmd->modifier[0] = I915_FORMAT_MOD_Y_TILED; > + break; > + default: > + DRM_DEBUG("Unsupported fb obj tiling %u!\n", > + obj->tiling_mode); > return -EINVAL; > } > } > -- > 2.3.2 >
On Wed, Apr 01, 2015 at 02:20:53PM +0200, Daniel Vetter wrote: > On Wed, Apr 01, 2015 at 10:53:45AM +0100, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > > > Makes it easier for userspace to start supporting Y tiled display, > > for at least the legacy format. > > > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Cc: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > > For the record: The point here is that we'll get a user for fb modifiers > by enabling Y tiling, not enabling Y tiling itself ... On that goal this > patch falls short, so nacked. Seriously? There is an existing client ready to use Y tiling framebuffers. There are none prepared to use the new api. Wishing will not change the inertia inherent in userspace. -Chris
On 04/01/2015 05:28 AM, Chris Wilson wrote: > On Wed, Apr 01, 2015 at 02:20:53PM +0200, Daniel Vetter wrote: >> On Wed, Apr 01, 2015 at 10:53:45AM +0100, Tvrtko Ursulin wrote: >>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >>> >>> Makes it easier for userspace to start supporting Y tiled display, >>> for at least the legacy format. >>> >>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >>> Cc: Chris Wilson <chris@chris-wilson.co.uk> >>> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> >> >> For the record: The point here is that we'll get a user for fb modifiers >> by enabling Y tiling, not enabling Y tiling itself ... On that goal this >> patch falls short, so nacked. > > Seriously? There is an existing client ready to use Y tiling framebuffers. > There are none prepared to use the new api. Wishing will not change the > inertia inherent in userspace. Yeah I'm not sure I understand the objection either... we want to use the new interface exclusively so this patch is nacked? Jesse
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6113
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -2 272/272 270/272
ILK -1 302/302 301/302
SNB 303/303 303/303
IVB 338/338 338/338
BYT -1 287/287 286/287
HSW 361/361 361/361
BDW 308/308 308/308
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
PNV igt@gem_tiled_pread_pwrite FAIL(3)PASS(7) FAIL(1)PASS(1)
PNV igt@gem_userptr_blits@coherency-sync CRASH(5)PASS(5) CRASH(2)
*ILK igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible PASS(2) DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...bsd_ring_idle@Hangcheck timer elapsed... bsd ring idle
*BYT igt@gem_exec_bad_domains@conflicting-write-domain PASS(8) FAIL(1)PASS(1)
Note: You need to pay more attention to line start with '*'
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1813190..de50631 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13347,10 +13347,19 @@ static int intel_framebuffer_init(struct drm_device *dev, return -EINVAL; } } else { - if (obj->tiling_mode == I915_TILING_X) + switch (obj->tiling_mode) { + case I915_TILING_NONE: + mode_cmd->modifier[0] = DRM_FORMAT_MOD_NONE; + break; + case I915_TILING_X: mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED; - else if (obj->tiling_mode == I915_TILING_Y) { - DRM_DEBUG("No Y tiling for legacy addfb\n"); + break; + case I915_TILING_Y: + mode_cmd->modifier[0] = I915_FORMAT_MOD_Y_TILED; + break; + default: + DRM_DEBUG("Unsupported fb obj tiling %u!\n", + obj->tiling_mode); return -EINVAL; } }