From patchwork Tue Apr 7 15:21:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 6172351 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D4B939F1C4 for ; Tue, 7 Apr 2015 15:22:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DA9592035D for ; Tue, 7 Apr 2015 15:22:17 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9B3DB203AF for ; Tue, 7 Apr 2015 15:22:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B63F6E5B9; Tue, 7 Apr 2015 08:22:15 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from relay.fireflyinternet.com (hostedrelay.fireflyinternet.com [109.228.30.76]) by gabe.freedesktop.org (Postfix) with ESMTP id 941846E5AB for ; Tue, 7 Apr 2015 08:22:11 -0700 (PDT) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by relay.fireflyinternet.com (FireflyRelay1) with ESMTP id 439636-1305619 for multiple; Tue, 07 Apr 2015 16:22:10 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Apr 2015 16:21:07 +0100 Message-Id: <1428420094-18352-44-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1428420094-18352-1-git-send-email-chris@chris-wilson.co.uk> References: <1428420094-18352-1-git-send-email-chris@chris-wilson.co.uk> X-Authenticated-User: chris.alporthouse@surfanytime.net Subject: [Intel-gfx] [PATCH 43/70] drm/i915: Cache the GGTT offset for the execlists context X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The offset doesn't change once the context is pinned, but the lookup turns out to be comparatively costly as it gets repeated for every request. v2: Rebase Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_lrc.c | 23 +++++++++++++---------- drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 6e73ff798a2a..26f96999a4a9 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -230,8 +230,8 @@ int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists return 0; } -static uint32_t execlists_ctx_descriptor(struct intel_engine_cs *ring, - struct drm_i915_gem_object *ctx_obj) +static uint32_t execlists_ctx_descriptor(struct intel_engine_cs *engine, + uint32_t ggtt_offset) { uint32_t desc; @@ -239,27 +239,28 @@ static uint32_t execlists_ctx_descriptor(struct intel_engine_cs *ring, desc |= LEGACY_CONTEXT << GEN8_CTX_MODE_SHIFT; desc |= GEN8_CTX_L3LLC_COHERENT; desc |= GEN8_CTX_PRIVILEGE; - desc |= i915_gem_obj_ggtt_offset(ctx_obj); + desc |= ggtt_offset; /* TODO: WaDisableLiteRestore when we start using semaphore * signalling between Command Streamers */ /* desc |= GEN8_CTX_FORCE_RESTORE; */ /* WaEnableForceRestoreInCtxtDescForVCS:skl */ - if (IS_GEN9(ring->dev) && INTEL_REVID(ring->dev) <= SKL_REVID_B0 && - (ring->id == BCS || ring->id == VCS || - ring->id == VECS || ring->id == VCS2)) + if (IS_GEN9(engine->dev) && INTEL_REVID(engine->dev) <= SKL_REVID_B0 && + (engine->id == BCS || engine->id == VCS || + engine->id == VECS || engine->id == VCS2)) desc |= GEN8_CTX_FORCE_RESTORE; return desc; } -static uint32_t execlists_request_write_tail(struct intel_engine_cs *ring, +static uint32_t execlists_request_write_tail(struct intel_engine_cs *engine, struct drm_i915_gem_request *rq) { - rq->ctx->engine[ring->id].ringbuf->regs[CTX_RING_TAIL+1] = rq->tail; - return execlists_ctx_descriptor(ring, rq->ctx->engine[ring->id].state); + struct intel_ringbuffer *ring = rq->ctx->engine[engine->id].ringbuf; + ring->regs[CTX_RING_TAIL+1] = rq->tail; + return execlists_ctx_descriptor(engine, ring->ggtt_offset); } static void execlists_submit_pair(struct intel_engine_cs *ring) @@ -510,7 +511,8 @@ static int intel_lr_context_pin(struct intel_engine_cs *ring, if (ret) goto reset_pin_count; - if (WARN_ON(i915_gem_obj_ggtt_offset(ctx_obj) & 0xFFFFFFFF00000FFFULL)) { + ringbuf->ggtt_offset = i915_gem_obj_ggtt_offset(ctx_obj); + if (WARN_ON(ringbuf->ggtt_offset & 0xFFFFFFFF00000FFFULL)) { ret = -ENODEV; goto unpin_ctx_obj; } @@ -533,6 +535,7 @@ reset_pin_count: return ret; } + int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request, struct intel_context *ctx) { diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 0899123c6bcc..55c91014bfdf 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -98,6 +98,7 @@ struct intel_ringbuffer { struct drm_i915_gem_object *obj; void __iomem *virtual_start; uint32_t *regs; + uint32_t ggtt_offset; struct intel_engine_cs *ring;