From patchwork Tue Apr 14 11:14:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joonas Lahtinen X-Patchwork-Id: 6214991 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C16EF9F2EC for ; Tue, 14 Apr 2015 11:15:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 905B020253 for ; Tue, 14 Apr 2015 11:15:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 392192021F for ; Tue, 14 Apr 2015 11:15:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7ABC46E073; Tue, 14 Apr 2015 04:15:03 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 169B4720AC for ; Tue, 14 Apr 2015 04:15:02 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 14 Apr 2015 04:15:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,576,1422950400"; d="scan'208";a="480678261" Received: from jlahtine-mobl1.ger.corp.intel.com (HELO [10.252.3.208]) ([10.252.3.208]) by FMSMGA003.fm.intel.com with ESMTP; 14 Apr 2015 04:15:00 -0700 Message-ID: <1429010097.8770.1.camel@jlahtine-mobl1> From: Joonas Lahtinen To: intel-gfx Date: Tue, 14 Apr 2015 14:14:57 +0300 In-Reply-To: <552BD772.20604@linux.intel.com> References: <552BD772.20604@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Mailer: Evolution 3.10.4 (3.10.4-4.fc20) Mime-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t v5] tests/gem_mmap_gtt: add huge BO test X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a straightforward test that allocates a BO that is bigger than (by 1 page currently) the mappable aperture, tests mmap access to it by CPU directly and through GTT in sequence. Currently it is expected for the GTT access to gracefully fail as all objects are attempted to get pinned to GTT completely for mmap access. Once the partial view support is merged to kernel, the test should pass for all parts. v2: - Corrected BO domain handling (Chris Wilson) - Check again after GTT access for added paranoia (Chris Wilson) v3: - Avoid flush by using pread (Chris Wilson) - Free gtt_pattern buffer too. v4: - Add more comments (Tvrtko Ursulin) - Use igt_require (Tvrtko Ursulin) v5: - Remove wrong message from igt_require_f (Tvrtko Ursulin) - After digging deeper to it, just igt_assert that the CPU mapping needs to succeed. Cc: Tvrtko Ursulin Cc: Chris Wilson Signed-off-by: Joonas Lahtinen Reviewed-by: Tvrtko Ursulin --- tests/gem_mmap_gtt.c | 106 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) diff --git a/tests/gem_mmap_gtt.c b/tests/gem_mmap_gtt.c index 115e398..487eecf 100644 --- a/tests/gem_mmap_gtt.c +++ b/tests/gem_mmap_gtt.c @@ -41,6 +41,10 @@ #include "drmtest.h" #include "igt_debugfs.h" +#ifndef PAGE_SIZE +#define PAGE_SIZE 4096 +#endif + static int OBJECT_SIZE = 16*1024*1024; static void @@ -55,6 +59,20 @@ set_domain_cpu(int fd, uint32_t handle) gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); } +static void +pread_bo(int fd, int handle, void *buf, int offset, int size) +{ + struct drm_i915_gem_pread gem_pread; + + memset(&gem_pread, 0, sizeof(gem_pread)); + gem_pread.handle = handle; + gem_pread.data_ptr = (uintptr_t)buf; + gem_pread.size = size; + gem_pread.offset = offset; + + igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_PREAD, &gem_pread) == 0); +} + static void * mmap_bo(int fd, uint32_t handle) { @@ -265,6 +283,92 @@ test_write_gtt(int fd) } static void +test_huge_bo(int fd) +{ + uint32_t bo; + char *ptr_cpu; + char *ptr_gtt; + char *cpu_pattern; + char *gtt_pattern; + uint64_t mappable_aperture_pages = gem_mappable_aperture_size() / + PAGE_SIZE; + uint64_t huge_object_size = (mappable_aperture_pages + 1) * PAGE_SIZE; + uint64_t last_offset = huge_object_size - PAGE_SIZE; + + cpu_pattern = malloc(PAGE_SIZE); + gtt_pattern = malloc(PAGE_SIZE); + igt_assert(cpu_pattern && gtt_pattern); + memset(cpu_pattern, 0xaa, PAGE_SIZE); + memset(gtt_pattern, ~0xaa, PAGE_SIZE); + + bo = gem_create(fd, huge_object_size); + + /* Obtain CPU mapping for the object. */ + ptr_cpu = gem_mmap__cpu(fd, bo, 0, huge_object_size, + PROT_READ | PROT_WRITE); + igt_assert(ptr_cpu); + + set_domain_cpu(fd, bo); + + /* Write first page through the mapping and assert reading it back + * works. */ + memcpy(ptr_cpu, cpu_pattern, PAGE_SIZE); + igt_assert(memcmp(ptr_cpu, cpu_pattern, PAGE_SIZE) == 0); + + /* Write last page through the mapping and assert reading it back + * works. */ + memcpy(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE); + igt_assert(memcmp(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE) == 0); + + /* Cross check that accessing two simultaneous pages works. */ + igt_assert(memcmp(ptr_cpu, ptr_cpu + last_offset, PAGE_SIZE) == 0); + + munmap(ptr_cpu, huge_object_size); + ptr_cpu = NULL; + + /* Obtain mapping for the object through GTT. */ + ptr_gtt = gem_mmap__gtt(fd, bo, huge_object_size, + PROT_READ | PROT_WRITE); + igt_require_f(ptr_gtt, "Huge BO GTT mapping not supported.\n"); + + set_domain_gtt(fd, bo); + + /* Access through GTT should still provide the CPU written values. */ + igt_assert(memcmp(ptr_gtt , cpu_pattern, PAGE_SIZE) == 0); + igt_assert(memcmp(ptr_gtt + last_offset, cpu_pattern, PAGE_SIZE) == 0); + + /* Try replacing first page through GTT mapping and make sure other page + * stays intact. */ + memcpy(ptr_gtt, gtt_pattern, PAGE_SIZE); + igt_assert(memcmp(ptr_gtt , gtt_pattern, PAGE_SIZE) == 0); + igt_assert(memcmp(ptr_gtt + last_offset, cpu_pattern, PAGE_SIZE) == 0); + + /* And make sure that after writing, both pages contain what they + * should.*/ + memcpy(ptr_gtt + last_offset, gtt_pattern, PAGE_SIZE); + igt_assert(memcmp(ptr_gtt , gtt_pattern, PAGE_SIZE) == 0); + igt_assert(memcmp(ptr_gtt + last_offset, gtt_pattern, PAGE_SIZE) == 0); + + munmap(ptr_gtt, huge_object_size); + ptr_gtt = NULL; + + /* Verify the page contents after GTT writes by reading without mapping. + * Mapping to CPU domain is avoided not to cause a huge flush. + */ + pread_bo(fd, bo, cpu_pattern, 0, PAGE_SIZE); + igt_assert(memcmp(cpu_pattern, gtt_pattern, PAGE_SIZE) == 0); + + memset(cpu_pattern, 0x00, PAGE_SIZE); + + pread_bo(fd, bo, cpu_pattern, last_offset, PAGE_SIZE); + igt_assert(memcmp(cpu_pattern, gtt_pattern, PAGE_SIZE) == 0); +out: + gem_close(fd, bo); + free(cpu_pattern); + free(gtt_pattern); +} + +static void test_read(int fd) { void *dst; @@ -402,6 +506,8 @@ igt_main run_without_prefault(fd, test_write_gtt); igt_subtest("write-cpu-read-gtt") test_write_cpu_read_gtt(fd); + igt_subtest("huge-bo") + test_huge_bo(fd); igt_fixture close(fd);