diff mbox

drm/i915/skl: Add back HDMI translation table

Message ID 1429011422-21810-1-git-send-email-sonika.jindal@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sonika.jindal@intel.com April 14, 2015, 11:37 a.m. UTC
The HDMI translation table is added back to bspec, so adding it,
and defaulting the 800mV+0dB entry.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c |   22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

Comments

Jani Nikula April 14, 2015, 2:11 p.m. UTC | #1
On Tue, 14 Apr 2015, Sonika Jindal <sonika.jindal@intel.com> wrote:
> The HDMI translation table is added back to bspec, so adding it,
> and defaulting the 800mV+0dB entry.

"add back"? Please reference the commit that removed the translations.

BR,
Jani.

>
> Cc: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c |   22 ++++++++++++----------
>  1 file changed, 12 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 5b50484..b974f8e 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -155,8 +155,17 @@ static const struct ddi_buf_trans skl_ddi_translations_edp[] = {
>  
>  
>  static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
> -					/* Idx	NT mV   T mV    db  */
> -	{ 0x00004014, 0x00000087 },	/* 0:	800	1000	2   */
> +	{ 0x00000018, 0x000000ac },
> +	{ 0x00005012, 0x0000009d },
> +	{ 0x00007011, 0x00000088 },
> +	{ 0x00000018, 0x000000a1 },
> +	{ 0x00000018, 0x00000098 },
> +	{ 0x00004013, 0x00000088 },
> +	{ 0x00006012, 0x00000087 },
> +	{ 0x00000018, 0x000000df },
> +	{ 0x00003015, 0x00000087 },
> +	{ 0x00003015, 0x000000c7 },
> +	{ 0x00000018, 0x000000c7 },
>  };
>  
>  enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
> @@ -214,16 +223,9 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
>  			n_edp_entries = ARRAY_SIZE(skl_ddi_translations_dp);
>  		}
>  
> -		/*
> -		 * On SKL, the recommendation from the hw team is to always use
> -		 * a certain type of level shifter (and thus the corresponding
> -		 * 800mV+2dB entry). Given that's the only validated entry, we
> -		 * override what is in the VBT, at least until further notice.
> -		 */
> -		hdmi_level = 0;
>  		ddi_translations_hdmi = skl_ddi_translations_hdmi;
>  		n_hdmi_entries = ARRAY_SIZE(skl_ddi_translations_hdmi);
> -		hdmi_default_entry = 0;
> +		hdmi_default_entry = 7;
>  	} else if (IS_BROADWELL(dev)) {
>  		ddi_translations_fdi = bdw_ddi_translations_fdi;
>  		ddi_translations_dp = bdw_ddi_translations_dp;
> -- 
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Shuang He April 15, 2015, 7:11 p.m. UTC | #2
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6190
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -3              276/276              273/276
ILK                 -1              301/301              300/301
SNB                                  316/316              316/316
IVB                 -1              328/328              327/328
BYT                                  285/285              285/285
HSW                                  394/394              394/394
BDW                                  321/321              321/321
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt@gem_userptr_blits@coherency-sync      CRASH(2)PASS(5)      FAIL(1)PASS(1)
 PNV  igt@gem_userptr_blits@coherency-unsync      CRASH(2)PASS(6)      CRASH(1)PASS(1)
*PNV  igt@gen3_render_tiledy_blits      FAIL(4)PASS(8)      CRASH(1)PASS(1)
*ILK  igt@gem_unfence_active_buffers      PASS(2)      DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...bsd_ring_idle@Hangcheck timer elapsed... bsd ring idle
 IVB  igt@gem_pwrite_pread@uncached-copy-performance      DMESG_WARN(3)PASS(8)      DMESG_WARN(2)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...blitter_ring_idle@Hangcheck timer elapsed... blitter ring idle
Note: You need to pay more attention to line start with '*'
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 5b50484..b974f8e 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -155,8 +155,17 @@  static const struct ddi_buf_trans skl_ddi_translations_edp[] = {
 
 
 static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = {
-					/* Idx	NT mV   T mV    db  */
-	{ 0x00004014, 0x00000087 },	/* 0:	800	1000	2   */
+	{ 0x00000018, 0x000000ac },
+	{ 0x00005012, 0x0000009d },
+	{ 0x00007011, 0x00000088 },
+	{ 0x00000018, 0x000000a1 },
+	{ 0x00000018, 0x00000098 },
+	{ 0x00004013, 0x00000088 },
+	{ 0x00006012, 0x00000087 },
+	{ 0x00000018, 0x000000df },
+	{ 0x00003015, 0x00000087 },
+	{ 0x00003015, 0x000000c7 },
+	{ 0x00000018, 0x000000c7 },
 };
 
 enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
@@ -214,16 +223,9 @@  static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
 			n_edp_entries = ARRAY_SIZE(skl_ddi_translations_dp);
 		}
 
-		/*
-		 * On SKL, the recommendation from the hw team is to always use
-		 * a certain type of level shifter (and thus the corresponding
-		 * 800mV+2dB entry). Given that's the only validated entry, we
-		 * override what is in the VBT, at least until further notice.
-		 */
-		hdmi_level = 0;
 		ddi_translations_hdmi = skl_ddi_translations_hdmi;
 		n_hdmi_entries = ARRAY_SIZE(skl_ddi_translations_hdmi);
-		hdmi_default_entry = 0;
+		hdmi_default_entry = 7;
 	} else if (IS_BROADWELL(dev)) {
 		ddi_translations_fdi = bdw_ddi_translations_fdi;
 		ddi_translations_dp = bdw_ddi_translations_dp;