From patchwork Fri Apr 17 14:00:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joonas Lahtinen X-Patchwork-Id: 6232781 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 33075BF4A6 for ; Fri, 17 Apr 2015 14:00:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 46C4A20121 for ; Fri, 17 Apr 2015 14:00:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 39D10200E6 for ; Fri, 17 Apr 2015 14:00:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B80756EB5F; Fri, 17 Apr 2015 07:00:10 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id CBA876EB5F for ; Fri, 17 Apr 2015 07:00:09 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 17 Apr 2015 07:00:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,595,1422950400"; d="scan'208";a="710856054" Received: from jlahtine-mobl1.ger.corp.intel.com (HELO [10.252.10.28]) ([10.252.10.28]) by fmsmga002.fm.intel.com with ESMTP; 17 Apr 2015 07:00:08 -0700 Message-ID: <1429279207.5819.1.camel@jlahtine-mobl1> From: Joonas Lahtinen To: intel-gfx Date: Fri, 17 Apr 2015 17:00:07 +0300 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Mailer: Evolution 3.10.4 (3.10.4-4.fc20) Mime-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/2] drm/i915: do not make assumptions on GGTT VMA sizes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP GGTT VMA sizes might be smaller than the whole object size due to different GGTT views. Signed-off-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem.c | 32 +++++++++++++++++++------------- drivers/gpu/drm/i915/i915_gem_gtt.c | 23 +++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gem_gtt.h | 4 ++++ 3 files changed, 46 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f7b8766..77116bd 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3507,7 +3507,7 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, { struct drm_device *dev = obj->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; - u32 size, fence_size, fence_alignment, unfenced_alignment; + u32 size, vma_size, fence_size, fence_alignment, unfenced_alignment; unsigned long start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0; unsigned long end = @@ -3518,15 +3518,18 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, if(WARN_ON(i915_is_ggtt(vm) != !!ggtt_view)) return ERR_PTR(-EINVAL); + size = ggtt_view ? i915_ggtt_view_size(obj, ggtt_view) : + obj->base.size; + fence_size = i915_gem_get_gtt_size(dev, - obj->base.size, + size, obj->tiling_mode); fence_alignment = i915_gem_get_gtt_alignment(dev, - obj->base.size, + size, obj->tiling_mode, true); unfenced_alignment = i915_gem_get_gtt_alignment(dev, - obj->base.size, + size, obj->tiling_mode, false); if (alignment == 0) @@ -3537,14 +3540,15 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, return ERR_PTR(-EINVAL); } - size = flags & PIN_MAPPABLE ? fence_size : obj->base.size; + vma_size = flags & PIN_MAPPABLE ? fence_size : size; /* If the object is bigger than the entire aperture, reject it early * before evicting everything in a vain attempt to find space. */ - if (obj->base.size > end) { - DRM_DEBUG("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%lu\n", - obj->base.size, + if (vma_size > end) { + DRM_DEBUG("Attempting to bind %s larger than the aperture: object=%u > %s aperture=%lu\n", + ggtt_view ? "a GGTT view " : "an object", + vma_size, flags & PIN_MAPPABLE ? "mappable" : "total", end); return ERR_PTR(-E2BIG); @@ -3564,13 +3568,13 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, search_free: ret = drm_mm_insert_node_in_range_generic(&vm->mm, &vma->node, - size, alignment, + vma_size, alignment, obj->cache_level, start, end, DRM_MM_SEARCH_DEFAULT, DRM_MM_CREATE_DEFAULT); if (ret) { - ret = i915_gem_evict_something(dev, vm, size, alignment, + ret = i915_gem_evict_something(dev, vm, vma_size, alignment, obj->cache_level, start, end, flags); @@ -4233,13 +4237,15 @@ i915_gem_object_do_pin(struct drm_i915_gem_object *obj, if ((bound ^ vma->bound) & GLOBAL_BIND) { bool mappable, fenceable; - u32 fence_size, fence_alignment; + u32 size, fence_size, fence_alignment; + + size = i915_ggtt_view_size(obj, ggtt_view); fence_size = i915_gem_get_gtt_size(obj->base.dev, - obj->base.size, + size, obj->tiling_mode); fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev, - obj->base.size, + size, obj->tiling_mode, true); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 18c695b..fd99fb5 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2976,3 +2976,26 @@ int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, return 0; } + +/** + * i915_ggtt_view_size - Get the size of a GGTT view. + * @obj: Object the view is of. + * @view: The view in question. + * + * @return The size of the GGTT view in bytes. + */ +size_t +i915_ggtt_view_size(struct drm_i915_gem_object *obj, + const struct i915_ggtt_view *view) +{ + BUG_ON(!view); + + if (view->type == I915_GGTT_VIEW_NORMAL || + view->type == I915_GGTT_VIEW_ROTATED) { + return obj->base.size; + } else { + WARN_ONCE(1, "GGTT view %u not implemented!\n", view->type); + return obj->base.size; + } +} + diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 29de64d..d6d6d5b 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -498,4 +498,8 @@ i915_ggtt_view_equal(const struct i915_ggtt_view *a, return a->type == b->type; } +size_t +i915_ggtt_view_size(struct drm_i915_gem_object *obj, + const struct i915_ggtt_view *view); + #endif