From patchwork Mon May 11 09:01:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdiel Janulgue X-Patchwork-Id: 6374601 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 33DE99F1C2 for ; Mon, 11 May 2015 09:01:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 52A8A20279 for ; Mon, 11 May 2015 09:01:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7DB2E20122 for ; Mon, 11 May 2015 09:01:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0DBB06E319; Mon, 11 May 2015 02:01:38 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A03E6E31B for ; Mon, 11 May 2015 02:01:36 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP; 11 May 2015 02:01:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,405,1427785200"; d="scan'208";a="692947520" Received: from unknown (HELO abj-mbp11.ger.corp.intel.com) ([10.252.9.205]) by orsmga001.jf.intel.com with ESMTP; 11 May 2015 02:01:33 -0700 From: Abdiel Janulgue To: intel-gfx@lists.freedesktop.org Date: Mon, 11 May 2015 12:01:11 +0300 Message-Id: <1431334872-3114-2-git-send-email-abdiel.janulgue@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431334872-3114-1-git-send-email-abdiel.janulgue@linux.intel.com> References: <1431334872-3114-1-git-send-email-abdiel.janulgue@linux.intel.com> Subject: [Intel-gfx] [PATCH 1/2] drm/i915/hsw/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Ensures that the batch buffer is executed by the resource streamer Signed-off-by: Abdiel Janulgue --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++++++++++++++ drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + include/uapi/drm/i915_drm.h | 7 ++++++- 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index a3190e79..afbd3c16 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1474,6 +1474,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, } else ring = &dev_priv->ring[(args->flags & I915_EXEC_RING_MASK) - 1]; + if (args->flags & I915_EXEC_RESOURCE_STREAMER) { + if (!IS_HASWELL(dev) && INTEL_INFO(dev)->gen < 8) { + DRM_DEBUG("RS is only allowed for Haswell, Gen8 " + "and above\n"); + return -EINVAL; + } + if (ring->id != RCS) { + DRM_DEBUG("RS is not available on %s)\n", + ring->name); + return -EINVAL; + } + + dispatch_flags |= I915_DISPATCH_RS; + } + if (!intel_ring_initialized(ring)) { DRM_DEBUG("execbuf with invalid ring: %d\n", (int)(args->flags & I915_EXEC_RING_MASK)); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index c761fe0..3521bc0 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -167,6 +167,7 @@ struct intel_engine_cs { unsigned dispatch_flags); #define I915_DISPATCH_SECURE 0x1 #define I915_DISPATCH_PINNED 0x2 +#define I915_DISPATCH_RS 0x4 void (*cleanup)(struct intel_engine_cs *ring); /* GEN8 signal/wait table - never trust comments! diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 551b673..a4c1a5c 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -760,7 +760,12 @@ struct drm_i915_gem_execbuffer2 { #define I915_EXEC_BSD_RING1 (1<<13) #define I915_EXEC_BSD_RING2 (2<<13) -#define __I915_EXEC_UNKNOWN_FLAGS -(1<<15) +/** Tell the kernel that the batchbuffer is processed by + * the resource streamer. + */ +#define I915_EXEC_RESOURCE_STREAMER (1<<16) + +#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER <<1) #define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) #define i915_execbuffer2_set_context_id(eb2, context) \