From patchwork Tue May 12 07:32:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 6386151 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EDF349F1C2 for ; Tue, 12 May 2015 07:31:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0940E203A0 for ; Tue, 12 May 2015 07:31:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 1ABAB203AC for ; Tue, 12 May 2015 07:31:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A69506E570; Tue, 12 May 2015 00:31:26 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 227AB6E570 for ; Tue, 12 May 2015 00:31:25 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 12 May 2015 00:31:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,413,1427785200"; d="scan'208";a="492458363" Received: from amanna-desktop.iind.intel.com ([10.223.25.39]) by FMSMGA003.fm.intel.com with ESMTP; 12 May 2015 00:31:23 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Tue, 12 May 2015 13:02:08 +0530 Message-Id: <1431415928-21270-2-git-send-email-animesh.manna@intel.com> X-Mailer: git-send-email 2.0.2 In-Reply-To: <1431415928-21270-1-git-send-email-animesh.manna@intel.com> References: <1431415928-21270-1-git-send-email-animesh.manna@intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/skl: corrected csr mutex lock declaration. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Specifically csr mutex lock is to protect csr-related data structures so declaration moved intel_csr structure. Signed-off-by: Animesh Manna Signed-off-by: A.Sunil Kamath Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/i915_dma.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 6 +++--- drivers/gpu/drm/i915/intel_csr.c | 12 ++++++------ 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index a238889..78e6ae8 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -816,7 +816,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) spin_lock_init(&dev_priv->mmio_flip_lock); mutex_init(&dev_priv->dpio_lock); mutex_init(&dev_priv->modeset_restore_lock); - mutex_init(&dev_priv->csr_lock); + mutex_init(&dev_priv->csr.csr_lock); intel_pm_setup(dev); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 136d42a..43011d7 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -676,6 +676,9 @@ enum csr_state { }; struct intel_csr { + /* CSR protection, used to protect firmware loading status: csr_state */ + struct mutex csr_lock; + const char *fw_path; __be32 *dmc_payload; uint32_t dmc_fw_size; @@ -1592,9 +1595,6 @@ struct drm_i915_private { struct intel_csr csr; - /* Display CSR-related protection */ - struct mutex csr_lock; - struct intel_gmbus gmbus[GMBUS_NUM_PINS]; /** gmbus_mutex protects against concurrent usage of the single hw gmbus diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index 174106f..b03b9b3 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -195,9 +195,9 @@ enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv) { enum csr_state state; - mutex_lock(&dev_priv->csr_lock); + mutex_lock(&dev_priv->csr.csr_lock); state = dev_priv->csr.state; - mutex_unlock(&dev_priv->csr_lock); + mutex_unlock(&dev_priv->csr.csr_lock); return state; } @@ -212,9 +212,9 @@ enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv) void intel_csr_load_status_set(struct drm_i915_private *dev_priv, enum csr_state state) { - mutex_lock(&dev_priv->csr_lock); + mutex_lock(&dev_priv->csr.csr_lock); dev_priv->csr.state = state; - mutex_unlock(&dev_priv->csr_lock); + mutex_unlock(&dev_priv->csr.csr_lock); } /** @@ -236,7 +236,7 @@ void intel_csr_load_program(struct drm_device *dev) return; } - mutex_lock(&dev_priv->csr_lock); + mutex_lock(&dev_priv->csr.csr_lock); fw_size = dev_priv->csr.dmc_fw_size; for (i = 0; i < fw_size; i++) I915_WRITE(CSR_PROGRAM_BASE + i * 4, @@ -248,7 +248,7 @@ void intel_csr_load_program(struct drm_device *dev) } dev_priv->csr.state = FW_LOADED; - mutex_unlock(&dev_priv->csr_lock); + mutex_unlock(&dev_priv->csr.csr_lock); } static void finish_csr_load(const struct firmware *fw, void *context)