From patchwork Mon May 18 17:25:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Bragg X-Patchwork-Id: 6430861 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CB1C0C0432 for ; Mon, 18 May 2015 17:25:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0A5F8205BE for ; Mon, 18 May 2015 17:25:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E41E4205BA for ; Mon, 18 May 2015 17:25:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 605FC6E54A; Mon, 18 May 2015 10:25:22 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f169.google.com (mail-wi0-f169.google.com [209.85.212.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D3816E54A; Mon, 18 May 2015 10:25:21 -0700 (PDT) Received: by wizk4 with SMTP id k4so87871906wiz.1; Mon, 18 May 2015 10:25:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=kS6Bd/gWVpI4Kc7LlMcWYOLtYJ7axjW0mX/koUdT+mA=; b=zZ/0IJci1+qAjca7uQXsXA40NNlU8aKF236fxlxxTH7hWuK1x4y75BbIftuzdWLW/a vzTIacb/6P9Kr77rvAakpLZtCospbHm0KxBZ7OZr17dRHb9RBIt3LQ3Y9aL7xLsDF3sW qDd/mTrvWP9KhrDjA1r3pQrBdxoiq1ftXrdLCRKpp7lNirsiBFaTZK/EkT0vV9mcsEyz 9G6mifGWU0KwLYhtddsv4499Dd30TgRZV9PatacXQb1/434xheIGGZXAM/JNglwTWJDg MrUo42ysK60rrZS1euMBiojFGCvYnN+CYaO6ayV5UbXjQ+zgTO1nccTqJAfZMwC8m8oM BN8w== X-Received: by 10.180.11.196 with SMTP id s4mr24007812wib.43.1431969920672; Mon, 18 May 2015 10:25:20 -0700 (PDT) Received: from sixbynine.org ([83.217.123.106]) by mx.google.com with ESMTPSA id ch2sm13393462wib.18.2015.05.18.10.25.19 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 May 2015 10:25:19 -0700 (PDT) From: Robert Bragg To: intel-gfx@lists.freedesktop.org Date: Mon, 18 May 2015 18:25:19 +0100 Message-Id: <1431969919-32233-1-git-send-email-robert@sixbynine.org> X-Mailer: git-send-email 2.4.1 In-Reply-To: <20150507142009.GX22099@nuc-i3427.alporthouse.com> References: <20150507142009.GX22099@nuc-i3427.alporthouse.com> Cc: Peter Zijlstra , David Airlie , linux-api@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ingo Molnar , Paul Mackerras , Arnaldo Carvalho de Melo , Daniel Vetter Subject: [Intel-gfx] [RFC PATCH v2] perf: Add PERF_EVENT_IOC_FLUSH ioctl X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To allow for pmus that may have internal buffering (e.g. the hardware itself writes out data to its own circular buffer which is only periodically forwarded to userspace via perf) this ioctl enables userspace to explicitly ensure it has received all samples before a point in time. v2: return int error status Signed-off-by: Robert Bragg --- include/linux/perf_event.h | 7 +++++++ include/uapi/linux/perf_event.h | 1 + kernel/events/core.c | 5 +++++ 3 files changed, 13 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index cf1d096..0c591eb 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -305,6 +305,13 @@ struct pmu { * Free pmu-private AUX data structures */ void (*free_aux) (void *aux); /* optional */ + + /* + * Flush buffered samples (E.g. for pmu hardware that writes samples to + * some intermediate buffer) userspace may need to explicitly ensure + * such samples have been forwarded to perf. + */ + int (*flush) (struct perf_event *event); /*optional */ }; /** diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index 309211b..cbf1b80 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -389,6 +389,7 @@ struct perf_event_attr { #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) #define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) #define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32) +#define PERF_EVENT_IOC_FLUSH _IO ('$', 9) enum perf_event_ioc_flags { PERF_IOC_FLAG_GROUP = 1U << 0, diff --git a/kernel/events/core.c b/kernel/events/core.c index 3fe532a..72daee6 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -4079,6 +4079,11 @@ static long _perf_ioctl(struct perf_event *event, unsigned int cmd, unsigned lon case PERF_EVENT_IOC_SET_BPF: return perf_event_set_bpf_prog(event, arg); + case PERF_EVENT_IOC_FLUSH: + if (event->pmu->flush) + return event->pmu->flush(event); + return 0; + default: return -ENOTTY; }