| Message ID | 1432314314-23530-2-git-send-email-mika.kuoppala@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On pe, 2015-05-22 at 20:04 +0300, Mika Kuoppala wrote: > When we touch gen8+ page maps, mark them dirty like we > do with previous gens. > > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +++++++++++---------- > 1 file changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 17b7df0..0ffd459 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -830,6 +830,15 @@ err_out: > return -ENOMEM; > } > > +/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we > + * are switching between contexts with the same LRCA, we also must do a force > + * restore. > + */ I think the comment could be updated now that it us used with GEN8 too. Regards, joonas > +static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt) > +{ > + ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask; > +} > + > static int gen8_alloc_va_range(struct i915_address_space *vm, > uint64_t start, > uint64_t length) > @@ -915,6 +924,7 @@ static int gen8_alloc_va_range(struct i915_address_space *vm, > } > > free_gen8_temp_bitmaps(new_page_dirs, new_page_tables); > + mark_tlbs_dirty(ppgtt); > return 0; > > err_out: > @@ -927,6 +937,7 @@ err_out: > unmap_and_free_pd(ppgtt->pdp.page_directory[pdpe], vm->dev); > > free_gen8_temp_bitmaps(new_page_dirs, new_page_tables); > + mark_tlbs_dirty(ppgtt); > return ret; > } > > @@ -1260,16 +1271,6 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, > kunmap_atomic(pt_vaddr); > } > > -/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we > - * are switching between contexts with the same LRCA, we also must do a force > - * restore. > - */ > -static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt) > -{ > - /* If current vm != vm, */ > - ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask; > -} > - > static void gen6_initialize_pt(struct i915_address_space *vm, > struct i915_page_table *pt) > {
On 5/22/2015 6:04 PM, Mika Kuoppala wrote: > When we touch gen8+ page maps, mark them dirty like we > do with previous gens. > > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +++++++++++---------- > 1 file changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 17b7df0..0ffd459 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -830,6 +830,15 @@ err_out: > return -ENOMEM; > } > > +/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we > + * are switching between contexts with the same LRCA, we also must do a force > + * restore. > + */ > +static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt) > +{ > + ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask; > +} > + > static int gen8_alloc_va_range(struct i915_address_space *vm, > uint64_t start, > uint64_t length) > @@ -915,6 +924,7 @@ static int gen8_alloc_va_range(struct i915_address_space *vm, > } > > free_gen8_temp_bitmaps(new_page_dirs, new_page_tables); > + mark_tlbs_dirty(ppgtt); > return 0; > > err_out: > @@ -927,6 +937,7 @@ err_out: > unmap_and_free_pd(ppgtt->pdp.page_directory[pdpe], vm->dev); > > free_gen8_temp_bitmaps(new_page_dirs, new_page_tables); > + mark_tlbs_dirty(ppgtt); > return ret; > } This seems to be for legacy submission only. In execlists, it's true we cannot use Force PD Restore, but we could use the more expensive (but functional) Force Restore. It could by handy (not for PDP updates which your next patch pre-allocates), in case there's something odd in the ctx pd/pt update that we haven't seen yet. > > @@ -1260,16 +1271,6 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, > kunmap_atomic(pt_vaddr); > } > > -/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we > - * are switching between contexts with the same LRCA, we also must do a force > - * restore. > - */ > -static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt) > -{ > - /* If current vm != vm, */ > - ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask; > -} > - > static void gen6_initialize_pt(struct i915_address_space *vm, > struct i915_page_table *pt) > { > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 17b7df0..0ffd459 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -830,6 +830,15 @@ err_out: return -ENOMEM; } +/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we + * are switching between contexts with the same LRCA, we also must do a force + * restore. + */ +static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt) +{ + ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask; +} + static int gen8_alloc_va_range(struct i915_address_space *vm, uint64_t start, uint64_t length) @@ -915,6 +924,7 @@ static int gen8_alloc_va_range(struct i915_address_space *vm, } free_gen8_temp_bitmaps(new_page_dirs, new_page_tables); + mark_tlbs_dirty(ppgtt); return 0; err_out: @@ -927,6 +937,7 @@ err_out: unmap_and_free_pd(ppgtt->pdp.page_directory[pdpe], vm->dev); free_gen8_temp_bitmaps(new_page_dirs, new_page_tables); + mark_tlbs_dirty(ppgtt); return ret; } @@ -1260,16 +1271,6 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, kunmap_atomic(pt_vaddr); } -/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we - * are switching between contexts with the same LRCA, we also must do a force - * restore. - */ -static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt) -{ - /* If current vm != vm, */ - ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.dev)->ring_mask; -} - static void gen6_initialize_pt(struct i915_address_space *vm, struct i915_page_table *pt) {
When we touch gen8+ page maps, mark them dirty like we do with previous gens. Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-)