From patchwork Fri Jun 12 17:36:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 6600011 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 741C0C0020 for ; Fri, 12 Jun 2015 17:37:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A1C9F205F9 for ; Fri, 12 Jun 2015 17:37:14 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id BABBD205EB for ; Fri, 12 Jun 2015 17:37:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CDCC86EB30; Fri, 12 Jun 2015 10:37:12 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qk0-f175.google.com (mail-qk0-f175.google.com [209.85.220.175]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F9A26EB2F for ; Fri, 12 Jun 2015 10:37:12 -0700 (PDT) Received: by qkhp85 with SMTP id p85so12903495qkh.1 for ; Fri, 12 Jun 2015 10:37:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0aiOJKCoViTP8ofqeUVU+zPmVfW1iHM7PP+ugqzikDg=; b=BHrHvsTenOlAJlP7xJjNAbdM7VB4GcOIfwVlBCjGiuMyHCKpagLpHdhDNx1PnnK0wv pI58B4mYT7k6qHgkjpNvdXqaX8gUK5Q7unAmv4wRUwAY6iqXQAvh2c5nTsb+O11Xc3K5 mmxr6MJUGUN7wcrs2JxhPZcD/Hv6qDygIDemKhTi+dnsPvlLOSQcCO+wapo0VIt1/I4G 5n+Hvz1oA/5gVj8GZwaalZHoW3vhmHjFzfwzoSuVzV4jWYA8VouRrtAgkLlOqIDDcUpw NjJ1UatnAwwEFkgZgh4K8QxrwvD/Hu6f2k0QICHz+nhjK2yTzy0MdjMd2dow2jeNvbpU +upQ== X-Received: by 10.140.134.83 with SMTP id 80mr20726834qhg.28.1434130631640; Fri, 12 Jun 2015 10:37:11 -0700 (PDT) Received: from localhost.localdomain ([187.95.117.237]) by mx.google.com with ESMTPSA id n4sm1935669qha.19.2015.06.12.10.37.10 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 12 Jun 2015 10:37:10 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Jun 2015 14:36:21 -0300 Message-Id: <1434130581-3864-5-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1434130581-3864-1-git-send-email-przanoni@gmail.com> References: <1434049347-2100-1-git-send-email-przanoni@gmail.com> <1434130581-3864-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 4/4] drm/i915: don't set the FBC plane select bits on HSW+ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni This commit is just to make the intentions explicit: on HSW+ these bits are MBZ, but since we only support plane A and the macro evaluates to zero when plane A is the parameter, we're not fixing any bug. v2: - Remove useless extra blank like (Chris). - Init dpfc_ctl in another place (Chris). Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 1ff288c..50ed333 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -262,7 +262,10 @@ static void gen7_fbc_enable(struct drm_crtc *crtc) dev_priv->fbc.enabled = true; - dpfc_ctl = IVB_DPFC_CTL_PLANE(intel_crtc->plane); + dpfc_ctl = 0; + if (IS_IVYBRIDGE(dev)) + dpfc_ctl |= IVB_DPFC_CTL_PLANE(intel_crtc->plane); + if (drm_format_plane_cpp(fb->pixel_format, 0) == 2) dev_priv->fbc.threshold++;