| Message ID | 1435580756-20154-5-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> On 6/29/2015 5:55 PM, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > We do the exact same steps around the disp2d/pipe A power well > enable/disable on VLV and CHV. Refactor the shared code into > some helpers. > > Note that this means we now call vlv_power_sequencer_reset() before > turning off the power well, whereas before we did it after. That > doesn't matter though since vlv_power_sequencer_reset() just resets > the power sequencer software tracking and doesn't touch the hardware > at all. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 52 +++++++++++++++------------------ > 1 file changed, 23 insertions(+), 29 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 1bd947a..6393b76 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -835,12 +835,8 @@ static bool vlv_power_well_enabled(struct drm_i915_private *dev_priv, > return enabled; > } > > -static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, > - struct i915_power_well *power_well) > +static void vlv_display_power_well_init(struct drm_i915_private *dev_priv) > { > - WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); > - > - vlv_set_power_well(dev_priv, power_well, true); > > spin_lock_irq(&dev_priv->irq_lock); > valleyview_enable_display_irqs(dev_priv); > @@ -858,18 +854,33 @@ static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, > i915_redisable_vga_power_on(dev_priv->dev); > } > > +static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv) > +{ > + spin_lock_irq(&dev_priv->irq_lock); > + valleyview_disable_display_irqs(dev_priv); > + spin_unlock_irq(&dev_priv->irq_lock); > + > + vlv_power_sequencer_reset(dev_priv); > +} > + > +static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, > + struct i915_power_well *power_well) > +{ > + WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); > + > + vlv_set_power_well(dev_priv, power_well, true); > + > + vlv_display_power_well_init(dev_priv); > +} > + > static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv, > struct i915_power_well *power_well) > { > WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); > > - spin_lock_irq(&dev_priv->irq_lock); > - valleyview_disable_display_irqs(dev_priv); > - spin_unlock_irq(&dev_priv->irq_lock); > + vlv_display_power_well_deinit(dev_priv); > > vlv_set_power_well(dev_priv, power_well, false); > - > - vlv_power_sequencer_reset(dev_priv); > } > > static void vlv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv, > @@ -1054,20 +1065,7 @@ static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv, > > chv_set_pipe_power_well(dev_priv, power_well, true); > > - spin_lock_irq(&dev_priv->irq_lock); > - valleyview_enable_display_irqs(dev_priv); > - spin_unlock_irq(&dev_priv->irq_lock); > - > - /* > - * During driver initialization/resume we can avoid restoring the > - * part of the HW/SW state that will be inited anyway explicitly. > - */ > - if (dev_priv->power_domains.initializing) > - return; > - > - intel_hpd_init(dev_priv); > - > - i915_redisable_vga_power_on(dev_priv->dev); > + vlv_display_power_well_init(dev_priv); > } > > static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, > @@ -1075,13 +1073,9 @@ static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, > { > WARN_ON_ONCE(power_well->data != PIPE_A); > > - spin_lock_irq(&dev_priv->irq_lock); > - valleyview_disable_display_irqs(dev_priv); > - spin_unlock_irq(&dev_priv->irq_lock); > + vlv_display_power_well_deinit(dev_priv); > > chv_set_pipe_power_well(dev_priv, power_well, false); > - > - vlv_power_sequencer_reset(dev_priv); > } > > /**
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 1bd947a..6393b76 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -835,12 +835,8 @@ static bool vlv_power_well_enabled(struct drm_i915_private *dev_priv, return enabled; } -static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well) +static void vlv_display_power_well_init(struct drm_i915_private *dev_priv) { - WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); - - vlv_set_power_well(dev_priv, power_well, true); spin_lock_irq(&dev_priv->irq_lock); valleyview_enable_display_irqs(dev_priv); @@ -858,18 +854,33 @@ static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, i915_redisable_vga_power_on(dev_priv->dev); } +static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv) +{ + spin_lock_irq(&dev_priv->irq_lock); + valleyview_disable_display_irqs(dev_priv); + spin_unlock_irq(&dev_priv->irq_lock); + + vlv_power_sequencer_reset(dev_priv); +} + +static void vlv_display_power_well_enable(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) +{ + WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); + + vlv_set_power_well(dev_priv, power_well, true); + + vlv_display_power_well_init(dev_priv); +} + static void vlv_display_power_well_disable(struct drm_i915_private *dev_priv, struct i915_power_well *power_well) { WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); - spin_lock_irq(&dev_priv->irq_lock); - valleyview_disable_display_irqs(dev_priv); - spin_unlock_irq(&dev_priv->irq_lock); + vlv_display_power_well_deinit(dev_priv); vlv_set_power_well(dev_priv, power_well, false); - - vlv_power_sequencer_reset(dev_priv); } static void vlv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv, @@ -1054,20 +1065,7 @@ static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv, chv_set_pipe_power_well(dev_priv, power_well, true); - spin_lock_irq(&dev_priv->irq_lock); - valleyview_enable_display_irqs(dev_priv); - spin_unlock_irq(&dev_priv->irq_lock); - - /* - * During driver initialization/resume we can avoid restoring the - * part of the HW/SW state that will be inited anyway explicitly. - */ - if (dev_priv->power_domains.initializing) - return; - - intel_hpd_init(dev_priv); - - i915_redisable_vga_power_on(dev_priv->dev); + vlv_display_power_well_init(dev_priv); } static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, @@ -1075,13 +1073,9 @@ static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv, { WARN_ON_ONCE(power_well->data != PIPE_A); - spin_lock_irq(&dev_priv->irq_lock); - valleyview_disable_display_irqs(dev_priv); - spin_unlock_irq(&dev_priv->irq_lock); + vlv_display_power_well_deinit(dev_priv); chv_set_pipe_power_well(dev_priv, power_well, false); - - vlv_power_sequencer_reset(dev_priv); } /**