From patchwork Fri Jul 3 14:09:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 6715541 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 974059F1C1 for ; Fri, 3 Jul 2015 14:09:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C92F820686 for ; Fri, 3 Jul 2015 14:09:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3D185207FB for ; Fri, 3 Jul 2015 14:09:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F1786ED79; Fri, 3 Jul 2015 07:09:37 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 1509D6E521 for ; Fri, 3 Jul 2015 07:09:36 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 03 Jul 2015 07:09:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,400,1432623600"; d="scan'208";a="755510173" Received: from rosetta.fi.intel.com (HELO rosetta) ([10.237.72.56]) by fmsmga002.fm.intel.com with ESMTP; 03 Jul 2015 07:09:34 -0700 Received: by rosetta (Postfix, from userid 1000) id 2EC858008A; Fri, 3 Jul 2015 17:09:39 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Fri, 3 Jul 2015 17:09:33 +0300 Message-Id: <1435932578-32209-3-git-send-email-mika.kuoppala@intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1435932578-32209-1-git-send-email-mika.kuoppala@intel.com> References: <1435932578-32209-1-git-send-email-mika.kuoppala@intel.com> Cc: miku@iki.fi Subject: [Intel-gfx] [PATCH 2/7] drm/i915: Convert execlists_update_context() for requests X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Pass around requests to carry context deeper in callchain. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/intel_lrc.c | 32 +++++++++++++------------------- 1 file changed, 13 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 583210d..4139eb6 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -329,19 +329,24 @@ static void execlists_elsp_write(struct intel_engine_cs *ring, spin_unlock(&dev_priv->uncore.lock); } -static int execlists_update_context(struct drm_i915_gem_object *ctx_obj, - struct drm_i915_gem_object *ring_obj, - struct i915_hw_ppgtt *ppgtt, - u32 tail) +static int execlists_update_context(struct drm_i915_gem_request *rq) { + struct intel_engine_cs *ring = rq->ring; + struct i915_hw_ppgtt *ppgtt = rq->ctx->ppgtt; + struct drm_i915_gem_object *ctx_obj = rq->ctx->engine[ring->id].state; + struct drm_i915_gem_object *rb_obj = rq->ringbuf->obj; struct page *page; uint32_t *reg_state; + BUG_ON(!ctx_obj); + WARN_ON(!i915_gem_obj_is_pinned(ctx_obj)); + WARN_ON(!i915_gem_obj_is_pinned(rb_obj)); + page = i915_gem_object_get_page(ctx_obj, 1); reg_state = kmap_atomic(page); - reg_state[CTX_RING_TAIL+1] = tail; - reg_state[CTX_RING_BUFFER_START+1] = i915_gem_obj_ggtt_offset(ring_obj); + reg_state[CTX_RING_TAIL+1] = rq->tail; + reg_state[CTX_RING_BUFFER_START+1] = i915_gem_obj_ggtt_offset(rb_obj); /* True PPGTT with dynamic page allocation: update PDP registers and * point the unallocated PDPs to the scratch page @@ -365,22 +370,11 @@ static void execlists_submit_requests(struct drm_i915_gem_request *rq0, struct drm_i915_gem_object *ctx_obj0 = rq0->ctx->engine[ring->id].state; struct drm_i915_gem_object *ctx_obj1 = NULL; - BUG_ON(!ctx_obj0); - WARN_ON(!i915_gem_obj_is_pinned(ctx_obj0)); - WARN_ON(!i915_gem_obj_is_pinned(rq0->ringbuf->obj)); - - execlists_update_context(ctx_obj1, rq0->ringbuf->obj, - rq0->ctx->ppgtt, rq0->tail); + execlists_update_context(rq0); if (rq1) { + execlists_update_context(rq1); ctx_obj1 = rq1->ctx->engine[ring->id].state; - - BUG_ON(!ctx_obj1); - WARN_ON(!i915_gem_obj_is_pinned(ctx_obj1)); - WARN_ON(!i915_gem_obj_is_pinned(rq1->ringbuf->obj)); - - execlists_update_context(ctx_obj1, rq1->ringbuf->obj, - rq1->ctx->ppgtt, rq1->tail); } execlists_elsp_write(ring, ctx_obj0, ctx_obj1);