Message ID | 1436388361-11130-5-git-send-email-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 07/09/2015 02:15 AM, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > To implement DPIO lane power gating on CHV we're going to need to access > DPIO registers from the cmn power well enable hook. That gets called > rather early, so we need to move the DPIO port IOSF sideband port > assignment earlier as well. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_dma.c | 20 ++++++++++++++++++++ > drivers/gpu/drm/i915/intel_display.c | 22 ---------------------- > 2 files changed, 20 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c > index 5e63076..3e9e98a 100644 > --- a/drivers/gpu/drm/i915/i915_dma.c > +++ b/drivers/gpu/drm/i915/i915_dma.c > @@ -783,6 +783,24 @@ static void intel_device_info_runtime_init(struct drm_device *dev) > info->has_eu_pg ? "y" : "n"); > } > > +static void intel_init_dpio(struct drm_i915_private *dev_priv) > +{ > + if (!IS_VALLEYVIEW(dev_priv)) > + return; > + > + /* > + * IOSF_PORT_DPIO is used for VLV x2 PHY (DP/HDMI B and C), > + * CHV x1 PHY (DP/HDMI D) > + * IOSF_PORT_DPIO_2 is used for CHV x2 PHY (DP/HDMI B and C) > + */ > + if (IS_CHERRYVIEW(dev_priv)) { > + DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2; > + DPIO_PHY_IOSF_PORT(DPIO_PHY1) = IOSF_PORT_DPIO; > + } else { > + DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO; > + } > +} > + > /** > * i915_driver_load - setup chip and create an initial config > * @dev: DRM device > @@ -983,6 +1001,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > > intel_device_info_runtime_init(dev); > > + intel_init_dpio(dev_priv); > + > if (INTEL_INFO(dev)->num_pipes) { > ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes); > if (ret) > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index db518a7..0473b38 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1590,26 +1590,6 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, > assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID); > } > > -static void intel_init_dpio(struct drm_device *dev) > -{ > - struct drm_i915_private *dev_priv = dev->dev_private; > - > - if (!IS_VALLEYVIEW(dev)) > - return; > - > - /* > - * IOSF_PORT_DPIO is used for VLV x2 PHY (DP/HDMI B and C), > - * CHV x1 PHY (DP/HDMI D) > - * IOSF_PORT_DPIO_2 is used for CHV x2 PHY (DP/HDMI B and C) > - */ > - if (IS_CHERRYVIEW(dev)) { > - DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2; > - DPIO_PHY_IOSF_PORT(DPIO_PHY1) = IOSF_PORT_DPIO; > - } else { > - DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO; > - } > -} > - > static void vlv_enable_pll(struct intel_crtc *crtc, > const struct intel_crtc_state *pipe_config) > { > @@ -15049,8 +15029,6 @@ void intel_modeset_init(struct drm_device *dev) > } > } > > - intel_init_dpio(dev); > - > intel_shared_dpll_init(dev); > > /* Just disable it once at startup */ Looks fine to me Reviewed-by: Deepak S <deepak.s@linux.intel.com>
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 5e63076..3e9e98a 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -783,6 +783,24 @@ static void intel_device_info_runtime_init(struct drm_device *dev) info->has_eu_pg ? "y" : "n"); } +static void intel_init_dpio(struct drm_i915_private *dev_priv) +{ + if (!IS_VALLEYVIEW(dev_priv)) + return; + + /* + * IOSF_PORT_DPIO is used for VLV x2 PHY (DP/HDMI B and C), + * CHV x1 PHY (DP/HDMI D) + * IOSF_PORT_DPIO_2 is used for CHV x2 PHY (DP/HDMI B and C) + */ + if (IS_CHERRYVIEW(dev_priv)) { + DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2; + DPIO_PHY_IOSF_PORT(DPIO_PHY1) = IOSF_PORT_DPIO; + } else { + DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO; + } +} + /** * i915_driver_load - setup chip and create an initial config * @dev: DRM device @@ -983,6 +1001,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) intel_device_info_runtime_init(dev); + intel_init_dpio(dev_priv); + if (INTEL_INFO(dev)->num_pipes) { ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes); if (ret) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index db518a7..0473b38 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1590,26 +1590,6 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID); } -static void intel_init_dpio(struct drm_device *dev) -{ - struct drm_i915_private *dev_priv = dev->dev_private; - - if (!IS_VALLEYVIEW(dev)) - return; - - /* - * IOSF_PORT_DPIO is used for VLV x2 PHY (DP/HDMI B and C), - * CHV x1 PHY (DP/HDMI D) - * IOSF_PORT_DPIO_2 is used for CHV x2 PHY (DP/HDMI B and C) - */ - if (IS_CHERRYVIEW(dev)) { - DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2; - DPIO_PHY_IOSF_PORT(DPIO_PHY1) = IOSF_PORT_DPIO; - } else { - DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO; - } -} - static void vlv_enable_pll(struct intel_crtc *crtc, const struct intel_crtc_state *pipe_config) { @@ -15049,8 +15029,6 @@ void intel_modeset_init(struct drm_device *dev) } } - intel_init_dpio(dev); - intel_shared_dpll_init(dev); /* Just disable it once at startup */