From patchwork Thu Jul 9 20:04:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 6758571 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E30339F319 for ; Thu, 9 Jul 2015 20:02:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 31C52205EE for ; Thu, 9 Jul 2015 20:02:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5047F205E9 for ; Thu, 9 Jul 2015 20:02:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C90D46ED2B; Thu, 9 Jul 2015 13:02:11 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f176.google.com (mail-wi0-f176.google.com [209.85.212.176]) by gabe.freedesktop.org (Postfix) with ESMTPS id DF6846ED2B for ; Thu, 9 Jul 2015 13:02:09 -0700 (PDT) Received: by wiga1 with SMTP id a1so322093339wig.0 for ; Thu, 09 Jul 2015 13:02:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HkBoRg6Uz4F6nZd8JG7Eh6OyrVA/JnZ2pwIuYIMkwHQ=; b=hUJryjbSAu1e5ILjIqJ3HJaBHVoWc1K1QEeRFL2iEDoxyyPVhXtyOcUKcT/6wCQ4Mo +DRYpdofWq5QIN+PRFgD1rFpLmXoT295nkYfd62kTxw3FYf0UMkbLN3lukuRpC0Cs90G d6DutmayyD4PTZLYSREIFuJHdMh1z3S5qgqqA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HkBoRg6Uz4F6nZd8JG7Eh6OyrVA/JnZ2pwIuYIMkwHQ=; b=Dx48l1ADWM+Zd8M8/aSUwsAfRko4eoU3/ODDC7n+KNRCzWoYVZ7t9lDQJyWF5N8wgX WjMM2lwyxqAqnIJ5o1WDurXiv0Gcvv7NwewmduAqlsL30hcKJQn9KMecrE2HFARQmkCh bMYmGGZSAYe7zbqKTsZhJScr/1O1lrVrXP7WZRg0kfBbptnPE784mgNf3q3RmUTcB6QW 4cZrIl74ozra5SUbOkekAhIFlb89pgnEWVGwcI8ZLs2Br2ONZzbmXW7ftEPHB57PBIkf 5GsKe3KvLcl3LNntKxDK+hK5yPxN9CPaq8SFnxJiJ6FCfDXTxuxuLkwvLLEqRJB9224s 0T7w== X-Gm-Message-State: ALoCoQlwal7Dja1XyVJGIEktPmzamSepYNltWekPWZVMRDCy+X3w/VltKKysKuRMRfskJI+6R9e8 X-Received: by 10.194.78.210 with SMTP id d18mr2280772wjx.34.1436472128329; Thu, 09 Jul 2015 13:02:08 -0700 (PDT) Received: from phenom.ffwll.local (212-51-149-109.fiber7.init7.net. [212.51.149.109]) by smtp.gmail.com with ESMTPSA id i5sm9807972wic.10.2015.07.09.13.02.05 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Jul 2015 13:02:06 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Thu, 9 Jul 2015 22:04:37 +0200 Message-Id: <1436472288-595-1-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1436365487-19242-1-git-send-email-animesh.manna@intel.com> References: <1436365487-19242-1-git-send-email-animesh.manna@intel.com> Cc: Daniel Vetter , Daniel Vetter Subject: [Intel-gfx] [PATCH 01/12] drm/i915: use correct power domain for csr loading X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Grabbing a runtime pm reference with intel_runtime_pm_get will only prevent device D3. But dmc firmware is required even earlier (namely for the skl power well 2). Hence we need to grab a rpm reference higher up in the hierarchy. For simplicity just grab the _INIT display power well. That's a bit too much, but since the firmware loading task should completely fairly quickly this won't be a real problem really. Cc: Animesh Manna Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_csr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index 6d8a7bf06dfc..16cd9dae1c1b 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -392,7 +392,7 @@ static void finish_csr_load(const struct firmware *fw, void *context) DRM_DEBUG_KMS("Finished loading %s\n", dev_priv->csr.fw_path); out: if (fw_loaded) - intel_runtime_pm_put(dev_priv); + intel_display_power_put(dev_priv, POWER_DOMAIN_INIT); else intel_csr_load_status_set(dev_priv, FW_FAILED); @@ -429,7 +429,7 @@ void intel_csr_ucode_init(struct drm_device *dev) * Obtain a runtime pm reference, until CSR is loaded, * to avoid entering runtime-suspend. */ - intel_runtime_pm_get(dev_priv); + intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); /* CSR supported for platform, load firmware */ ret = request_firmware_nowait(THIS_MODULE, true, csr->fw_path,