From patchwork Fri Jul 10 13:06:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tim.gore@intel.com X-Patchwork-Id: 6765981 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8C5CAC05AD for ; Fri, 10 Jul 2015 13:06:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C46232067A for ; Fri, 10 Jul 2015 13:06:11 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id E5578206CB for ; Fri, 10 Jul 2015 13:06:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 684A36E5BD; Fri, 10 Jul 2015 06:06:10 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 56A766E5BD for ; Fri, 10 Jul 2015 06:06:09 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 10 Jul 2015 06:06:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,446,1432623600"; d="scan'208";a="761939669" Received: from tgore-linux2.isw.intel.com ([10.102.226.157]) by orsmga002.jf.intel.com with ESMTP; 10 Jul 2015 06:06:07 -0700 From: tim.gore@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 10 Jul 2015 14:06:06 +0100 Message-Id: <1436533566-11048-1-git-send-email-tim.gore@intel.com> X-Mailer: git-send-email 1.9.1 Cc: thomas.wood@intel.com Subject: [Intel-gfx] [PATCH i-g-t] lib/igt_gt.c : allow changes to stop_rings mode bits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tim Gore In function igt_set_stop_rings, the test igt_assert_f(flags == 0 || current == 0, .. will fail if we are trying to force a hang but the STOP_RINGS_ALLOW_BAN or STOP_RINGS_ALLOW_ERROR bit is set. With the introduction of per ring resets in the driver (in android) these bits do not get cleared to zero when an individual ring is reset. This causes subsequent attempt to cause a ring hang via this function to fail, leading to several igt tests failing (ie gem_reset_stats subtest ban-xxx etc). So, modify this test to look only at the bits that are used to hang the gpu rings. Signed-off-by: Tim Gore --- lib/igt_gt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/igt_gt.c b/lib/igt_gt.c index 8e5e076..12c56fa 100644 --- a/lib/igt_gt.c +++ b/lib/igt_gt.c @@ -345,8 +345,8 @@ void igt_set_stop_rings(enum stop_ring_flags flags) STOP_RING_ALLOW_ERRORS)) == 0); current = igt_get_stop_rings(); - igt_assert_f(flags == 0 || current == 0, - "previous i915_ring_stop is still 0x%x\n", current); + igt_assert_f( (flags & STOP_RING_ALL) == 0 || (current & STOP_RING_ALL) == 0, + "previous i915_ring_stop is still 0x%x\n", current); stop_rings_write(flags); current = igt_get_stop_rings();