From patchwork Sat Jul 25 19:00:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 6865441 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A35D8C05AC for ; Sat, 25 Jul 2015 19:01:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9B22D20615 for ; Sat, 25 Jul 2015 19:01:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 83CED20611 for ; Sat, 25 Jul 2015 19:01:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DDB386E523; Sat, 25 Jul 2015 12:01:05 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 847D56E51E for ; Sat, 25 Jul 2015 12:01:04 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 25 Jul 2015 12:01:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,543,1432623600"; d="scan'208";a="735456293" Received: from amanna-desktop.iind.intel.com ([10.223.25.39]) by orsmga001.jf.intel.com with ESMTP; 25 Jul 2015 12:01:02 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Sun, 26 Jul 2015 00:30:33 +0530 Message-Id: <1437850839-16782-13-git-send-email-animesh.manna@intel.com> X-Mailer: git-send-email 2.0.2 In-Reply-To: <1437850839-16782-1-git-send-email-animesh.manna@intel.com> References: <1437850839-16782-1-git-send-email-animesh.manna@intel.com> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 12/18] drm/i915/gen9: Use dev_priv in csr functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Daniel Vetter As all csr firmware related opertion are not using any any data structures of drm framework level, so better to use dev_priv instead of dev. it's a new style! :) Cc: Damien Lespiau Cc: Imre Deak Cc: Sunil Kamath Signed-off-by: Daniel Vetter Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_dma.c | 6 +++--- drivers/gpu/drm/i915/i915_drv.c | 4 +--- drivers/gpu/drm/i915/intel_csr.c | 31 +++++++++++++------------------ drivers/gpu/drm/i915/intel_drv.h | 6 +++--- 4 files changed, 20 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index e8a503b..15b0642 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1022,7 +1022,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) intel_runtime_pm_enable(dev_priv); /* Load CSR Firmware for SKL */ - intel_csr_ucode_init(dev); + intel_csr_ucode_init(dev_priv); i915_audio_component_init(dev_priv); @@ -1052,7 +1052,7 @@ out_mtrrfree: out_gtt: i915_global_gtt_cleanup(dev); out_freecsr: - intel_csr_ucode_fini(dev); + intel_csr_ucode_fini(dev_priv); intel_uncore_fini(dev); pci_iounmap(dev->pdev, dev_priv->regs); put_bridge: @@ -1133,7 +1133,7 @@ int i915_driver_unload(struct drm_device *dev) intel_fbc_cleanup_cfb(dev_priv); i915_gem_cleanup_stolen(dev); - intel_csr_ucode_fini(dev); + intel_csr_ucode_fini(dev_priv); intel_teardown_gmbus(dev); intel_teardown_mchbar(dev); diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 44dd28f..98343eb 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1043,10 +1043,8 @@ static int bxt_resume_prepare(struct drm_i915_private *dev_priv) static int skl_resume_prepare(struct drm_i915_private *dev_priv) { - struct drm_device *dev = dev_priv->dev; - skl_init_cdclk(dev_priv); - intel_csr_load_program(dev); + intel_csr_load_program(dev_priv); return 0; } diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index 56381cf..f42449b 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -198,19 +198,18 @@ static char intel_get_substepping(struct drm_device *dev) /** * intel_csr_load_program() - write the firmware from memory to register. - * @dev: drm device. + * @dev_priv: i915 drm device. * * CSR firmware is read from a .bin file and kept in internal memory one time. * Everytime display comes back from low power state this function is called to * copy the firmware from internal memory to registers. */ -void intel_csr_load_program(struct drm_device *dev) +void intel_csr_load_program(struct drm_i915_private *dev_priv) { - struct drm_i915_private *dev_priv = dev->dev_private; uint32_t *payload = dev_priv->csr.dmc_payload; uint32_t i, fw_size; - if (!IS_GEN9(dev)) { + if (!IS_GEN9(dev_priv)) { DRM_ERROR("No CSR support available for this platform\n"); return; } @@ -345,7 +344,6 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, static void finish_csr_load(const struct firmware *fw, void *context) { struct drm_i915_private *dev_priv = context; - struct drm_device *dev = dev_priv->dev; if (!fw) goto out; @@ -355,11 +353,11 @@ static void finish_csr_load(const struct firmware *fw, void *context) goto out; /* load csr program during system boot, as needed for DC states */ - intel_csr_load_program(dev); + intel_csr_load_program(dev_priv); DRM_DEBUG_KMS("Finished loading %s\n", dev_priv->csr.fw_path); out: - if (dev_priv->csr.dmc_payload || IS_BROXTON(dev)) + if (dev_priv->csr.dmc_payload || IS_BROXTON(dev_priv)) intel_runtime_pm_put(dev_priv); else DRM_ERROR("Failed to load DMC firmware, disabling rpm\n"); @@ -374,23 +372,22 @@ out: /** * intel_csr_ucode_init() - initialize the firmware loading. - * @dev: drm device. + * @dev_priv: i915 drm device. * * This function is called at the time of loading the display driver to read * firmware from a .bin file and copied into a internal memory. */ -void intel_csr_ucode_init(struct drm_device *dev) +void intel_csr_ucode_init(struct drm_i915_private *dev_priv) { - struct drm_i915_private *dev_priv = dev->dev_private; struct intel_csr *csr = &dev_priv->csr; int ret; - if (!HAS_CSR(dev)) + if (!HAS_CSR(dev_priv)) return; - if (IS_SKYLAKE(dev)) + if (IS_SKYLAKE(dev_priv)) csr->fw_path = I915_CSR_SKL; - else if (IS_BROXTON(dev)) + else if (IS_BROXTON(dev_priv)) csr->fw_path = I915_CSR_BXT; DRM_DEBUG_KMS("Loading %s\n", csr->fw_path); @@ -410,16 +407,14 @@ void intel_csr_ucode_init(struct drm_device *dev) /** * intel_csr_ucode_fini() - unload the CSR firmware. - * @dev: drm device. + * @dev_priv: i915 drm device. * * Firmmware unloading includes freeing the internal momory and reset the * firmware loading status. */ -void intel_csr_ucode_fini(struct drm_device *dev) +void intel_csr_ucode_fini(struct drm_i915_private *dev_priv) { - struct drm_i915_private *dev_priv = dev->dev_private; - - if (!HAS_CSR(dev)) + if (!HAS_CSR(dev_priv)) return; kfree(dev_priv->csr.dmc_payload); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 46143f6..644286f 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1148,9 +1148,9 @@ u32 skl_plane_ctl_tiling(uint64_t fb_modifier); u32 skl_plane_ctl_rotation(unsigned int rotation); /* intel_csr.c */ -void intel_csr_ucode_init(struct drm_device *dev); -void intel_csr_load_program(struct drm_device *dev); -void intel_csr_ucode_fini(struct drm_device *dev); +void intel_csr_ucode_init(struct drm_i915_private *); +void intel_csr_load_program(struct drm_i915_private *); +void intel_csr_ucode_fini(struct drm_i915_private *); /* intel_dp.c */ void intel_dp_init(struct drm_device *dev, int output_reg, enum port port);