[BXT,MIPI,v2,03/13] drm/i915/bxt: Disable DSI PLL for BXT

Message ID	1437899840-32153-4-git-send-email-uma.shankar@intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Uma Shankar <uma.shankar@intel.com> To: intel-gfx@lists.freedesktop.org Date: Sun, 26 Jul 2015 14:07:10 +0530 Message-Id: <1437899840-32153-4-git-send-email-uma.shankar@intel.com> In-Reply-To: <1437899840-32153-1-git-send-email-uma.shankar@intel.com> References: <1437899840-32153-1-git-send-email-uma.shankar@intel.com> Cc: shobhit.kumar@intel.com Subject: [Intel-gfx] [BXT MIPI PATCH v2 03/13] drm/i915/bxt: Disable DSI PLL for BXT Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

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1437899840-32153-4-git-send-email-uma.shankar@intel.com (mailing list archive)

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New, archived

Headers

From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Date: Sun, 26 Jul 2015 14:07:10 +0530
Message-Id: <1437899840-32153-4-git-send-email-uma.shankar@intel.com>
In-Reply-To: <1437899840-32153-1-git-send-email-uma.shankar@intel.com>
References: <1437899840-32153-1-git-send-email-uma.shankar@intel.com>
Cc: shobhit.kumar@intel.com
Subject: [Intel-gfx] [BXT MIPI PATCH v2 03/13] drm/i915/bxt: Disable DSI PLL
	for BXT
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Content-Transfer-Encoding: base64
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Commit Message

Shankar, Uma July 26, 2015, 8:37 a.m. UTC

From: Shashank Sharma <shashank.sharma@intel.com>

This patch adds two new functions:
- disable_dsi_pll.
  BXT DSI disable sequence and registers are
  different from previous platforms.
- intel_disable_dsi_pll
  wrapper function to re-use the same code for
  multiple platforms. It checks platform type and
  calls appropriate core pll disable function.

v2: Fixed Jani's review comments.

Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c     |    2 +-
 drivers/gpu/drm/i915/intel_dsi.h     |    2 +-
 drivers/gpu/drm/i915/intel_dsi_pll.c |   32 +++++++++++++++++++++++++++++++-
 3 files changed, 33 insertions(+), 3 deletions(-)

Comments

Daniel Vetter July 27, 2015, 9:28 a.m. UTC | #1

On Sun, Jul 26, 2015 at 02:07:10PM +0530, Uma Shankar wrote:
> From: Shashank Sharma <shashank.sharma@intel.com>
> 
> This patch adds two new functions:
> - disable_dsi_pll.
>   BXT DSI disable sequence and registers are
>   different from previous platforms.
> - intel_disable_dsi_pll
>   wrapper function to re-use the same code for
>   multiple platforms. It checks platform type and
>   calls appropriate core pll disable function.
> 
> v2: Fixed Jani's review comments.
> 
> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi.c     |    2 +-
>  drivers/gpu/drm/i915/intel_dsi.h     |    2 +-
>  drivers/gpu/drm/i915/intel_dsi_pll.c |   32 +++++++++++++++++++++++++++++++-
>  3 files changed, 33 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index e201c0f..544166f 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -548,7 +548,7 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
>  		usleep_range(2000, 2500);
>  	}
>  
> -	vlv_disable_dsi_pll(encoder);
> +	intel_disable_dsi_pll(encoder);
>  }
>  
>  static void intel_dsi_post_disable(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index 20cfcf07..759983e 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -122,7 +122,7 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
>  }
>  
>  extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
> -extern void vlv_disable_dsi_pll(struct intel_encoder *encoder);
> +extern void intel_disable_dsi_pll(struct intel_encoder *encoder);

Kerneldoc for the entire dsi subsystem would be awesome ... are you
working on that too?
-Daniel

>  extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
>  
>  struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index b07483b..f335e6c 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -276,7 +276,7 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder)
>  	DRM_DEBUG_KMS("DSI PLL locked\n");
>  }
>  
> -void vlv_disable_dsi_pll(struct intel_encoder *encoder)
> +static void vlv_disable_dsi_pll(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
>  	u32 tmp;
> @@ -293,6 +293,26 @@ void vlv_disable_dsi_pll(struct intel_encoder *encoder)
>  	mutex_unlock(&dev_priv->sb_lock);
>  }
>  
> +static void bxt_disable_dsi_pll(struct intel_encoder *encoder)
> +{
> +	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
> +	u32 val;
> +
> +	DRM_DEBUG_KMS("\n");
> +
> +	val = I915_READ(BXT_DSI_PLL_ENABLE);
> +	val &= ~BXT_DSI_PLL_DO_ENABLE;
> +	I915_WRITE(BXT_DSI_PLL_ENABLE, val);
> +
> +	/*
> +	 * PLL lock should deassert within 200us.
> +	 * Wait up to 1ms before timing out.
> +	 */
> +	if (wait_for((I915_READ(BXT_DSI_PLL_ENABLE)
> +					& BXT_DSI_PLL_LOCKED) == 0, 1))
> +		DRM_ERROR("Timeout waiting for PLL lock deassertion\n");
> +}
> +
>  static void assert_bpp_mismatch(int pixel_format, int pipe_bpp)
>  {
>  	int bpp = dsi_pixel_format_bpp(pixel_format);
> @@ -456,3 +476,13 @@ void intel_enable_dsi_pll(struct intel_encoder *encoder)
>  	else if (IS_BROXTON(dev))
>  		bxt_enable_dsi_pll(encoder);
>  }
> +
> +void intel_disable_dsi_pll(struct intel_encoder *encoder)
> +{
> +	struct drm_device *dev = encoder->base.dev;
> +
> +	if (IS_VALLEYVIEW(dev))
> +		vlv_disable_dsi_pll(encoder);
> +	else if (IS_BROXTON(dev))
> +		bxt_disable_dsi_pll(encoder);
> +}
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Shankar, Uma July 27, 2015, 10:38 a.m. UTC | #2

On 7/27/2015 2:58 PM, Daniel Vetter wrote:
> On Sun, Jul 26, 2015 at 02:07:10PM +0530, Uma Shankar wrote:
>> From: Shashank Sharma <shashank.sharma@intel.com>
>>
>> This patch adds two new functions:
>> - disable_dsi_pll.
>>    BXT DSI disable sequence and registers are
>>    different from previous platforms.
>> - intel_disable_dsi_pll
>>    wrapper function to re-use the same code for
>>    multiple platforms. It checks platform type and
>>    calls appropriate core pll disable function.
>>
>> v2: Fixed Jani's review comments.
>>
>> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
>> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_dsi.c     |    2 +-
>>   drivers/gpu/drm/i915/intel_dsi.h     |    2 +-
>>   drivers/gpu/drm/i915/intel_dsi_pll.c |   32 +++++++++++++++++++++++++++++++-
>>   3 files changed, 33 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
>> index e201c0f..544166f 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi.c
>> +++ b/drivers/gpu/drm/i915/intel_dsi.c
>> @@ -548,7 +548,7 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
>>   		usleep_range(2000, 2500);
>>   	}
>>   
>> -	vlv_disable_dsi_pll(encoder);
>> +	intel_disable_dsi_pll(encoder);
>>   }
>>   
>>   
>>   extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
>> -extern void vlv_disable_dsi_pll(struct intel_encoder *encoder);
>> +extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
> Kerneldoc for the entire dsi subsystem would be awesome ... are you
> working on that too?
> -Daniel
Hi Daniel,
Yes that would be really good document to have. Currently not working on 
that, but will take this up and create a documentation for DSI subsystem 
along with generic mipi sequence parsing from VBT and backlight control.

Regards,
Uma Shankar
> -void vlv_disable_dsi_pll(struct intel_encoder *encoder)
> +static void vlv_disable_dsi_pll(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
>   	u32 tmp;
> @@ -293,6 +293,26 @@ void vlv_disable_dsi_pll(struct intel_encoder *encoder)
>   	mutex_unlock(&dev_priv->sb_lock);
>   }
>
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index e201c0f..544166f 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -548,7 +548,7 @@  static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
 		usleep_range(2000, 2500);
 	}
 
-	vlv_disable_dsi_pll(encoder);
+	intel_disable_dsi_pll(encoder);
 }
 
 static void intel_dsi_post_disable(struct intel_encoder *encoder)
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 20cfcf07..759983e 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -122,7 +122,7 @@  static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 }
 
 extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
-extern void vlv_disable_dsi_pll(struct intel_encoder *encoder);
+extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
 extern u32 vlv_get_dsi_pclk(struct intel_encoder *encoder, int pipe_bpp);
 
 struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index b07483b..f335e6c 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -276,7 +276,7 @@  static void vlv_enable_dsi_pll(struct intel_encoder *encoder)
 	DRM_DEBUG_KMS("DSI PLL locked\n");
 }
 
-void vlv_disable_dsi_pll(struct intel_encoder *encoder)
+static void vlv_disable_dsi_pll(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 	u32 tmp;
@@ -293,6 +293,26 @@  void vlv_disable_dsi_pll(struct intel_encoder *encoder)
 	mutex_unlock(&dev_priv->sb_lock);
 }
 
+static void bxt_disable_dsi_pll(struct intel_encoder *encoder)
+{
+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
+	u32 val;
+
+	DRM_DEBUG_KMS("\n");
+
+	val = I915_READ(BXT_DSI_PLL_ENABLE);
+	val &= ~BXT_DSI_PLL_DO_ENABLE;
+	I915_WRITE(BXT_DSI_PLL_ENABLE, val);
+
+	/*
+	 * PLL lock should deassert within 200us.
+	 * Wait up to 1ms before timing out.
+	 */
+	if (wait_for((I915_READ(BXT_DSI_PLL_ENABLE)
+					& BXT_DSI_PLL_LOCKED) == 0, 1))
+		DRM_ERROR("Timeout waiting for PLL lock deassertion\n");
+}
+
 static void assert_bpp_mismatch(int pixel_format, int pipe_bpp)
 {
 	int bpp = dsi_pixel_format_bpp(pixel_format);
@@ -456,3 +476,13 @@  void intel_enable_dsi_pll(struct intel_encoder *encoder)
 	else if (IS_BROXTON(dev))
 		bxt_enable_dsi_pll(encoder);
 }
+
+void intel_disable_dsi_pll(struct intel_encoder *encoder)
+{
+	struct drm_device *dev = encoder->base.dev;
+
+	if (IS_VALLEYVIEW(dev))
+		vlv_disable_dsi_pll(encoder);
+	else if (IS_BROXTON(dev))
+		bxt_disable_dsi_pll(encoder);
+}

[BXT,MIPI,v2,03/13] drm/i915/bxt: Disable DSI PLL for BXT

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