From patchwork Fri Aug 14 21:34:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 7019511 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 92647C05AC for ; Fri, 14 Aug 2015 21:34:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C944D20643 for ; Fri, 14 Aug 2015 21:34:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 1182B20638 for ; Fri, 14 Aug 2015 21:34:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 876D96E8C9; Fri, 14 Aug 2015 14:34:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 631896E8BE for ; Fri, 14 Aug 2015 14:34:37 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 14 Aug 2015 14:34:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,680,1432623600"; d="scan'208";a="783960236" Received: from jamtsfi1-mobl1.amr.corp.intel.com (HELO panetone.amr.corp.intel.com) ([10.254.187.138]) by fmsmga002.fm.intel.com with ESMTP; 14 Aug 2015 14:34:36 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Fri, 14 Aug 2015 18:34:09 -0300 Message-Id: <1439588061-18064-5-git-send-email-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.4.6 In-Reply-To: <1439588061-18064-1-git-send-email-paulo.r.zanoni@intel.com> References: <1439588061-18064-1-git-send-email-paulo.r.zanoni@intel.com> Subject: [Intel-gfx] [PATCH 04/16] drm/i915: set ILK_DPFC_FENCE_YOFF to 0 on SNB X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The doc is pretty clear that this register should be set to 0 on SNB. We already write y_offset to DPFC_CPU_FENCE_OFFSET a few lines below. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 9ffa7dc..f7be9ab8 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -216,7 +216,12 @@ static void ilk_fbc_enable(struct intel_crtc *crtc) dpfc_ctl |= obj->fence_reg; y_offset = get_crtc_fence_y_offset(crtc); - I915_WRITE(ILK_DPFC_FENCE_YOFF, y_offset); + + if (IS_GEN5(dev_priv)) + I915_WRITE(ILK_DPFC_FENCE_YOFF, y_offset); + else + I915_WRITE(ILK_DPFC_FENCE_YOFF, 0); + I915_WRITE(ILK_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj) | ILK_FBC_RT_VALID); /* enable it... */ I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);