From patchwork Thu Aug 20 07:45:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhiyuan Lv X-Patchwork-Id: 7041521 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7D3E5C05AC for ; Thu, 20 Aug 2015 07:58:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9922E2054C for ; Thu, 20 Aug 2015 07:58:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A169B203B1 for ; Thu, 20 Aug 2015 07:58:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EE4CF72170; Thu, 20 Aug 2015 00:58:19 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 45F9172165 for ; Thu, 20 Aug 2015 00:58:18 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 20 Aug 2015 00:58:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,714,1432623600"; d="scan'208";a="787356552" Received: from zlv-hp-dev.bj.intel.com ([10.238.158.60]) by fmsmga002.fm.intel.com with ESMTP; 20 Aug 2015 00:58:17 -0700 From: Zhiyuan Lv To: intel-gfx@lists.freedesktop.org Date: Thu, 20 Aug 2015 15:45:21 +0800 Message-Id: <1440056724-26976-5-git-send-email-zhiyuan.lv@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440056724-26976-1-git-send-email-zhiyuan.lv@intel.com> References: <1440056724-26976-1-git-send-email-zhiyuan.lv@intel.com> Cc: igvt-g@lists.01.org Subject: [Intel-gfx] [PATCH 4/7] drm/i915: always pin lrc context for vgpu with Intel GVT-g X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Intel GVT-g will perform EXECLIST context shadowing and ring buffer shadowing. The shadow copy is created when guest creates a context. If a context changes its LRCA address, the hypervisor is hard to know whether it is a new context or not. We always pin context objects to global GTT to make life easier. Signed-off-by: Zhiyuan Lv Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/intel_lrc.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 39df304..4b2ac37 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2282,7 +2282,8 @@ void intel_lr_context_free(struct intel_context *ctx) ctx->engine[i].ringbuf; struct intel_engine_cs *ring = ringbuf->ring; - if (ctx == ring->default_context) { + if ((ctx == ring->default_context) || + (intel_vgpu_active(ring->dev))) { intel_unpin_ringbuffer_obj(ringbuf); i915_gem_object_ggtt_unpin(ctx_obj); } @@ -2353,6 +2354,8 @@ int intel_lr_context_deferred_create(struct intel_context *ctx, struct intel_engine_cs *ring) { const bool is_global_default_ctx = (ctx == ring->default_context); + const bool need_to_pin_ctx = (is_global_default_ctx || + (intel_vgpu_active(ring->dev))); struct drm_device *dev = ring->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_gem_object *ctx_obj; @@ -2374,7 +2377,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx, return -ENOMEM; } - if (is_global_default_ctx) { + if (need_to_pin_ctx) { ret = i915_gem_obj_ggtt_pin(ctx_obj, GEN8_LR_CONTEXT_ALIGN, PIN_OFFSET_BIAS | GUC_WOPCM_TOP); if (ret) { @@ -2415,7 +2418,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx, goto error_free_rbuf; } - if (is_global_default_ctx) { + if (need_to_pin_ctx) { ret = intel_pin_and_map_ringbuffer_obj(dev, ringbuf); if (ret) { DRM_ERROR( @@ -2464,14 +2467,14 @@ int intel_lr_context_deferred_create(struct intel_context *ctx, return 0; error: - if (is_global_default_ctx) + if (need_to_pin_ctx) intel_unpin_ringbuffer_obj(ringbuf); error_destroy_rbuf: intel_destroy_ringbuffer_obj(ringbuf); error_free_rbuf: kfree(ringbuf); error_unpin_ctx: - if (is_global_default_ctx) + if (need_to_pin_ctx) i915_gem_object_ggtt_unpin(ctx_obj); drm_gem_object_unreference(&ctx_obj->base); return ret;